Abstract: A semiconductor process wafer having substantially co-planar active areas and a laser marked area in an adjacent inactive area and method for forming the same to eliminate a step height and improve a subsequent patterning process over the active areas wherein an inactive area trench is formed overlying the laser marked area in parallel with formation of STI trenches in the active area whereby the active areas and the inactive area are formed substantially co-planar without a step height.

Abstract: A semiconductor process wafer having substantially co-planar active areas and a laser marked area in an adjacent inactive area and method for forming the same to eliminate a step height and improve a subsequent patterning process over the active areas wherein an inactive area trench is formed overlying the laser marked area in parallel with formation of STI trenches in the active area whereby the active areas and the inactive area are formed substantially co-planar without a step height.

Abstract: A method for developing a photo-exposed photoresist layer to improve a critical dimension uniformity (CDU) for a semiconductor device manufacturing process including providing a semiconductor process wafer having a process surface comprising a photoresist layer photo-exposed according to an exposure pattern; dispensing a predetermined amount of developer solution over a stationary semiconductor process wafer to form a film of developer solution covering the process surface; partially developing the exposed portions of the photoresist layer comprising maintaining the semiconductor process wafer in a stationary position for a predetermined time period; rotating the semiconductor process wafer for a predetermined period of time to remove a portion of the developer solution; and, repeating the steps of dispensing, partially developing, and rotating, for a predetermined number of repetition cycles to complete a photoresist development process.

Abstract: A method for developing a photo-exposed photoresist layer to improve a critical dimension uniformity (CDU) for a semiconductor device manufacturing process including providing a semiconductor process wafer having a process surface comprising a photoresist layer photo-exposed according to an exposure pattern; dispensing a predetermined amount of developer solution over a stationary semiconductor process wafer to form a film of developer solution covering the process surface; partially developing the exposed portions of the photoresist layer comprising maintaining the semiconductor process wafer in a stationary position for a predetermined time period; rotating the semiconductor process wafer for a predetermined period of time to remove a portion of the developer solution; and, repeating the steps of dispensing, partially developing, and rotating, for a predetermined number of repetition cycles to complete a photoresist development process.