Patents by Inventor Ching-Ju Chen

Ching-Ju Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973425
    Abstract: A power converter includes a power stage circuit, a ramp generator circuit, and a control circuit. The power stage circuit generates an output signal according to an input signal and a control signal. The ramp generator circuit generates a ramp signal according to the control signal, the input signal, and the output signal. The control circuit generates the control signal according to the output signal, a reference signal, and the ramp signal.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: April 30, 2024
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Chieh-Ju Tsai, Ching-Jan Chen, Zhen-Guo Ding, Zhe-Hui Lin, Wei-Ling Chen
  • Publication number: 20240077479
    Abstract: A detection system and method for the migrating cell is provided. The system is configured to detect a migrating cell combined with an immunomagnetic bead. The system includes a platform, a microchannel, a magnetic field source, a coherent light source and an optical sensing module. The microchannel is configured to allow the migrating cell to flow in it along a flow direction. The magnetic field source is configured to provide magnetic force to the migrating cell combined with the immunomagnetic bead. The magnetic force includes at least one magnetic force component and the magnetic force component is opposite to the flow direction of the microchannel. The coherent light source is configured to provide the microchannel with the coherent light. The optical sensing module is configured to receive the interference light caused by the coherent light being reflected by the sample inside the microchannel.
    Type: Application
    Filed: August 10, 2023
    Publication date: March 7, 2024
    Applicant: DeepBrain Tech. Inc
    Inventors: Han-Lin Wang, Chia-Wei Chen, Yao-Wen Liang, Ting-Chun Lin, Yun-Ting Kuo, You-Yin Chen, Yu-Chun Lo, Ssu-Ju Li, Ching-Wen Chang, Yi-Chen Lin
  • Patent number: 11894340
    Abstract: A package structure includes a wiring structure and a first electronic device. The wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The first electronic device is electrically connected to the wiring structure, and has a first surface, a second surface and at least one lateral side surface extending between the first surface and the second surface. The first electronic device includes a first active circuit region and a first protrusion portion. The first protrusion portion protrudes from the at least one lateral side surface of the first electronic device. A portion of the first active circuit region is disposed in the first protrusion portion.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: February 6, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Syu-Tang Liu, Min Lung Huang, Huang-Hsien Chang, Tsung-Tang Tsai, Ching-Ju Chen
  • Publication number: 20240021540
    Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.
    Type: Application
    Filed: August 15, 2023
    Publication date: January 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Syu-Tang LIU, Min Lung HUANG, Huang-Hsien CHANG, Tsung-Tang TSAI, Ching-Ju CHEN
  • Patent number: 11728282
    Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: August 15, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Syu-Tang Liu, Min Lung Huang, Huang-Hsien Chang, Tsung-Tang Tsai, Ching-Ju Chen
  • Patent number: 11608170
    Abstract: A buoy position monitoring method includes a buoy positioning step, an unmanned aerial vehicle receiving step and an unmanned aerial vehicle flying step. In the buoy positioning step, a plurality of buoys are put on a water surface. Each of the buoys is capable of sending a detecting signal. Each of the detecting signals is sent periodically and includes a position dataset of each of the buoys. In the unmanned aerial vehicle receiving step, an unmanned aerial vehicle is disposed on an initial position, and the unmanned aerial vehicle receives the detecting signals. In the unmanned aerial vehicle flying step, when at least one of the buoys is lost, the unmanned aerial vehicle flies to a predetermined position to get contact with the at least one buoy that is lost.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: March 21, 2023
    Assignee: NATIONAL YUNLIN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Ching-Ju Chen, Chuan-Yu Chang, Chia-Yan Cheng, Meng-Syue Li, Yueh-Min Huang
  • Publication number: 20230027674
    Abstract: A semiconductor device and method for manufacturing the same are provided. The method includes providing a first substrate. The method also includes forming a first metal layer on the first substrate. The first metal layer includes a first metal material. The method further includes treating a first surface of the first metal layer with a solution including an ion of a second metal material. In addition, the method includes forming a plurality of metal particles including the second metal material on a portion of the first surface of the first metal layer.
    Type: Application
    Filed: September 30, 2022
    Publication date: January 26, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jhao-Cheng CHEN, Huang-Hsien CHANG, Wen-Long LU, Shao Hsuan CHUANG, Ching-Ju CHEN, Tse-Chuan CHOU
  • Patent number: 11495557
    Abstract: A semiconductor device and method for manufacturing the same are provided. The method includes providing a first substrate. The method also includes forming a first metal layer on the first substrate. The first metal layer includes a first metal material. The method further includes treating a first surface of the first metal layer with a solution including an ion of a second metal material. In addition, the method includes forming a plurality of metal particles including the second metal material on a portion of the first surface of the first metal layer.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: November 8, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Jhao-Cheng Chen, Huang-Hsien Chang, Wen-Long Lu, Shao Hsuan Chuang, Ching-Ju Chen, Tse-Chuan Chou
  • Publication number: 20220223507
    Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.
    Type: Application
    Filed: March 29, 2022
    Publication date: July 14, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Syu-Tang LIU, Tsung-Tang TSAI, Huang-Hsien CHANG, Ching-Ju CHEN
  • Patent number: 11289411
    Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: March 29, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Syu-Tang Liu, Tsung-Tang Tsai, Huang-Hsien Chang, Ching-Ju Chen
  • Publication number: 20210296267
    Abstract: A semiconductor device and method for manufacturing the same are provided. The method includes providing a first substrate. The method also includes forming a first metal layer on the first substrate. The first metal layer includes a first metal material. The method further includes treating a first surface of the first metal layer with a solution including an ion of a second metal material. In addition, the method includes forming a plurality of metal particles including the second metal material on a portion of the first surface of the first metal layer.
    Type: Application
    Filed: March 20, 2020
    Publication date: September 23, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jhao-Cheng CHEN, Huang-Hsien CHANG, Wen-Long LU, Shao Hsuan CHUANG, Ching-Ju CHEN, Tse-Chuan CHOU
  • Publication number: 20210233836
    Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.
    Type: Application
    Filed: July 29, 2020
    Publication date: July 29, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Syu-Tang LIU, Tsung-Tang TSAI, Huang-Hsien CHANG, Ching-Ju CHEN
  • Publication number: 20210151407
    Abstract: A package structure includes a wiring structure and a first electronic device. The wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The first electronic device is electrically connected to the wiring structure, and has a first surface, a second surface and at least one lateral side surface extending between the first surface and the second surface. The first electronic device includes a first active circuit region and a first protrusion portion. The first protrusion portion protrudes from the at least one lateral side surface of the first electronic device. A portion of the first active circuit region is disposed in the first protrusion portion.
    Type: Application
    Filed: November 15, 2019
    Publication date: May 20, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Syu-Tang LIU, Min Lung HUANG, Huang-Hsien CHANG, Tsung-Tang TSAI, Ching-Ju CHEN
  • Publication number: 20210118812
    Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.
    Type: Application
    Filed: October 17, 2019
    Publication date: April 22, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Syu-Tang LIU, Min Lung HUANG, Huang-Hsien CHANG, Tsung-Tang TSAI, Ching-Ju CHEN
  • Publication number: 20200324897
    Abstract: A buoy position monitoring method includes a buoy positioning step, an unmanned aerial vehicle receiving step and an unmanned aerial vehicle flying step. In the buoy positioning step, a plurality of buoys are put on a water surface. Each of the buoys is capable of sending a detecting signal. Each of the detecting signals is sent periodically and includes a position dataset of each of the buoys. In the unmanned aerial vehicle receiving step, an unmanned aerial vehicle is disposed on an initial position, and the unmanned aerial vehicle receives the detecting signals. In the unmanned aerial vehicle flying step, when at least one of the buoys is lost, the unmanned aerial vehicle flies to a predetermined position to get contact with the at least one buoy that is lost.
    Type: Application
    Filed: April 9, 2020
    Publication date: October 15, 2020
    Inventors: Ching-Ju CHEN, Chuan-Yu CHANG, Chia-Yan CHENG, Meng-Syue LI
  • Patent number: 10741483
    Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: August 11, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Syu-Tang Liu, Tsung-Tang Tsai, Huang-Hsien Chang, Ching-Ju Chen