Patents by Inventor CHING-KAI CHUANG

CHING-KAI CHUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230240064
    Abstract: The present application provides a memory device having a memory cell with reduced protrusion protruding from the memory cell. The memory device includes a semiconductor substrate having a fin portion protruding from a surface of the semiconductor substrate; a semiconductive layer disposed conformal to the fin portion; a conductive layer disposed over the semiconductive layer; an insulating layer disposed over the conductive layer; and a protrusion including a first protruding portion laterally protruding from the semiconductive layer and along the surface, a second protruding portion laterally protruding from the conductive layer and over the first protruding portion, and a third protruding portion laterally protruding from the insulating layer and over the second protruding portion, wherein the protrusion has an undercut profile.
    Type: Application
    Filed: January 24, 2022
    Publication date: July 27, 2023
    Inventor: CHING-KAI CHUANG
  • Publication number: 20230238276
    Abstract: The present disclosure provides a semiconductor structure having an air gap surrounding a lower portion of a bit line, and a manufacturing method of the semiconductor structure. The semiconductor structure includes a substrate; a bit line structure disposed over the substrate; a first dielectric layer, surrounding the bit line structure; a second dielectric layer, surrounding a lower portion of the first dielectric layer, wherein the second dielectric layer is separated from the first dielectric layer by a first air gap; and a third dielectric layer, surrounding an upper portion of the first dielectric layer and sealing the first air gap.
    Type: Application
    Filed: January 24, 2022
    Publication date: July 27, 2023
    Inventor: CHING-KAI CHUANG
  • Publication number: 20230238433
    Abstract: The present disclosure provides a method for manufacturing a semiconductor structure. The method includes: forming a bit line over a substrate; forming a first spacer layer over and conformal to the bit line; forming a sacrificial layer over and conformal to the first spacer layer; forming a second spacer layer over and conformal to the sacrificial layer; forming a mask layer covering a lower portion of the second spacer layer; removing an upper portion of the second spacer layer; removing the sacrificial layer; and forming a third spacer layer over the first spacer layer and the second spacer layer. thereby forming a first air gap surrounded by the lower portion of the second spacer layer.
    Type: Application
    Filed: January 24, 2022
    Publication date: July 27, 2023
    Inventor: Ching-Kai CHUANG
  • Publication number: 20230240061
    Abstract: The present application provides a method of manufacturing a memory device.
    Type: Application
    Filed: January 24, 2022
    Publication date: July 27, 2023
    Inventor: Ching-Kai CHUANG