Patents by Inventor CHING-KAI LIANG

CHING-KAI LIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatuses, methods, and systems for a configurable accelerator having dataflow execution circuits
    Patent number: 12086080
    Abstract: Systems, methods, and apparatuses relating to a configurable accelerator having dataflow execution circuits are described.
    Type: Grant
    Filed: September 26, 2020
    Date of Patent: September 10, 2024
    Assignee: Intel Corporation
    Inventors: George Chrysos, Bhargavi Narayanasetty, Jesus Corbal, Ching-Kai Liang, Chinmay Ashok, Francis Tseng
  • Method for manufacturing semiconductor device
    Patent number: 12074110
    Abstract: A method for forming a semiconductor device includes receiving a first bonded to a second substrate by a dielectric layer, wherein a conductive layer is disposed in the dielectric layer and a cavity is formed between the first substrate, the second substrate and the dielectric layer; forming a via opening in the second substrate to expose the conductive layer and a vent hole in the substrate to couple to the cavity; forming a first buffer layer covering sidewalls of the via opening and a second buffer layer covering sidewalls of the vent hole; and forming a connecting structure in the via opening and a sealing structure to seal the vent hole.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: August 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ching-Kai Shen, Yi-Chuan Teng, Wei-Chu Lin, Hung-Wei Liang, Jung-Kuo Tu
  • SYNCHRONOUS MICROTHREADING
    Publication number: 20230315455
    Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
    Type: Application
    Filed: April 2, 2022
    Publication date: October 5, 2023
    Inventors: David B. SHEFFIELD, Erich BOLEYN, Jonathan PEARCE, Sofia PEDIADITAKI, Jeffrey COOK, Shreesha SRINATH, Ching-Kai LIANG, Tyler SONDAG
  • SYNCHRONOUS MICROTHREADING
    Publication number: 20230315458
    Abstract: Techniques for using soft-barrier hints are described. An example includes a synchronous microthreading (SyMT) co-processor coupled to a logical processor to execute a plurality of microthreads, with each microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode, wherein the SyMT co-processor is further to support a soft-barrier hint instruction in code which when processed by a microthread is to pause execution of the microthread to be resumed based at least in part on a data structure having at least one entry, the entry to include an instruction pointer of the soft-barrier hint instruction and a count of microthreads that have encountered the soft-barrier hint instruction at the instruction pointer.
    Type: Application
    Filed: April 2, 2022
    Publication date: October 5, 2023
    Inventors: Shreesha SRINATH, Jonathan PEARCE, David B. SHEFFIELD, Ching-Kai LIANG, Jeffrey COOK
  • SYNCHRONOUS MICROTHREADING
    Publication number: 20230315445
    Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
    Type: Application
    Filed: April 2, 2022
    Publication date: October 5, 2023
    Inventors: David B. SHEFFIELD, Erich BOLEYN, Jonathan PEARCE, Sofia PEDIADITAKI, Jeffrey COOK, Shreesha SRINATH, Ching-Kai LIANG, Tyler SONDAG
  • SYNCHRONOUS MICROTHREADING
    Publication number: 20230315444
    Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
    Type: Application
    Filed: April 2, 2022
    Publication date: October 5, 2023
    Inventors: David B. SHEFFIELD, Erich BOLEYN, Jonathan PEARCE, Sofia PEDIADITAKI, Jeffrey COOK, Shreesha SRINATH, Ching-Kai LIANG, Tyler SONDAG
  • SYNCHRONOUS MICROTHREADING
    Publication number: 20230315572
    Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
    Type: Application
    Filed: April 2, 2022
    Publication date: October 5, 2023
    Inventors: David B. SHEFFIELD, Erich BOLEYN, Jonathan PEARCE, Sofia PEDIADITAKI, Jeffrey COOK, Shreesha SRINATH, Ching-Kai LIANG, Tyler SONDAG
  • SYNCHRONOUS MICROTHREADING
    Publication number: 20230315461
    Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
    Type: Application
    Filed: April 2, 2022
    Publication date: October 5, 2023
    Inventors: David B. SHEFFIELD, Erich BOLEYN, Jonathan PEARCE, Sofia PEDIADITAKI, Jeffrey COOK, Shreesha SRINATH, Ching-Kai LIANG, Tyler SONDAG
  • SYNCHRONOUS MICROTHREADING
    Publication number: 20230315459
    Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
    Type: Application
    Filed: April 2, 2022
    Publication date: October 5, 2023
    Inventors: David B. SHEFFIELD, Erich BOLEYN, Jonathan PEARCE, Sofia PEDIADITAKI, Jeffrey COOK, Shreesha SRINATH, Ching-Kai LIANG, Tyler SONDAG
  • SYNCHRONOUS MICROTHREADING
    Publication number: 20230315462
    Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
    Type: Application
    Filed: April 2, 2022
    Publication date: October 5, 2023
    Inventors: David B. SHEFFIELD, Erich BOLEYN, Jonathan PEARCE, Sofia PEDIADITAKI, Jeffrey COOK, Shreesha SRINATH, Ching-Kai LIANG, Tyler SONDAG
  • SYNCHRONOUS MICROTHREADING
    Publication number: 20230315460
    Abstract: Techniques for synchronous microthreaded execution are described. An example includes a logical processor to execute one or more threads in a first mode; and a synchronous microthreading (SyMT) co-processor coupled to the logical processor to execute lightweight microthreads, with each lightweight microthread having an independent register state, upon an execution of an instruction to enter into SyMT mode.
    Type: Application
    Filed: April 2, 2022
    Publication date: October 5, 2023
    Inventors: David B. SHEFFIELD, Erich BOLEYN, Jonathan PEARCE, Sofia PEDIADITAKI, Jeffrey COOK, Shreesha SRINATH, Ching-Kai LIANG, Tyler SONDAG
  • APPARATUSES, METHODS, AND SYSTEMS FOR A CONFIGURABLE ACCELERATOR HAVING DATAFLOW EXECUTION CIRCUITS
    Publication number: 20220100680
    Abstract: Systems, methods, and apparatuses relating to a configurable accelerator having dataflow execution circuits are described.
    Type: Application
    Filed: September 26, 2020
    Publication date: March 31, 2022
    Inventors: GEORGE CHRYSOS, BHARGAVI NARAYANASETTY, JESUS CORBAL, CHING-KAI LIANG, CHINMAY ASHOK, FRANCIS TSENG