Patents by Inventor Ching Kooi Hor

Ching Kooi Hor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Techniques for preventing voltage tampering of security control circuits
    Patent number: 11443073
    Abstract: An integrated circuit includes a comparator circuit that generates a control signal based on a comparison between a threshold voltage and a supply voltage. The integrated circuit also includes a clock signal generation circuit that generates a clock signal and that receives the control signal. The clock signal generation circuit decreases a frequency of the clock signal to a reduced frequency in response to the control signal indicating that the supply voltage has decreased below the threshold voltage. The integrated circuit also includes a secure device manager circuit that has a timing circuit. The clock signal is provided to a clock input of the timing circuit. The timing circuit receives supply current from the supply voltage. The secure device manager circuit performs a security function for the integrated circuit using the timing circuit in response to the clock signal with the reduced frequency.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: September 13, 2022
    Assignee: Intel Corporation
    Inventors: Wei Yee Koay, Ting Lu, Ching Kooi Hor, Chin Ghee Ch'ng
  • Techniques For Preventing Voltage Tampering Of Security Control Circuits
    Publication number: 20190138754
    Abstract: An integrated circuit includes a comparator circuit that generates a control signal based on a comparison between a threshold voltage and a supply voltage. The integrated circuit also includes a clock signal generation circuit that generates a clock signal and that receives the control signal. The clock signal generation circuit decreases a frequency of the clock signal to a reduced frequency in response to the control signal indicating that the supply voltage has decreased below the threshold voltage. The integrated circuit also includes a secure device manager circuit that has a timing circuit. The clock signal is provided to a clock input of the timing circuit. The timing circuit receives supply current from the supply voltage. The secure device manager circuit performs a security function for the integrated circuit using the timing circuit in response to the clock signal with the reduced frequency.
    Type: Application
    Filed: December 17, 2018
    Publication date: May 9, 2019
    Applicant: Intel Corporation
    Inventors: Wei Yee Koay, Ting Lu, Ching Kooi Hor, Chin Ghee Ch'ng