Patents by Inventor Ching Ku Lin

Ching Ku Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136291
    Abstract: Semiconductor devices and methods of forming the same are provided. In some embodiments, a method includes receiving a workpiece having a redistribution layer disposed over and electrically coupled to an interconnect structure. In some embodiments, the method further includes patterning the redistribution layer to form a recess between and separating a first conductive feature and a second conductive feature of the redistribution layer, where corners of the first conductive feature and the second conductive feature are defined adjacent to and on either side of the recess. The method further includes depositing a first dielectric layer over the first conductive feature, the second conductive feature, and within the recess. The method further includes depositing a nitride layer over the first dielectric layer. In some examples, the method further includes removing portions of the nitride layer disposed over the corners of the first conductive feature and the second conductive feature.
    Type: Application
    Filed: January 12, 2023
    Publication date: April 25, 2024
    Inventors: Hsiang-Ku SHEN, Chen-Chiu HUANG, Chia-Nan LIN, Man-Yun WU, Wen-Tzu CHEN, Sean YANG, Dian-Hao CHEN, Chi-Hao CHANG, Ching-Wei LIN, Wen-Ling CHANG
  • Publication number: 20240121896
    Abstract: The present disclosure provides a circuit board including a first circuit layer, a dielectric layer on the first circuit layer, and a seed layer on the dielectric layer and directly contacting the first circuit layer, in which a top surface of the seed layer includes a levelled portion. The circuit board also includes a second circuit layer on the levelled portion of the seed layer, in which a grain boundary density of the second circuit layer is lower than that of a portion of the seed layer directly contacting the first circuit layer.
    Type: Application
    Filed: December 13, 2022
    Publication date: April 11, 2024
    Inventors: Chien Jung CHEN, Jia Hao LIANG, Ching Ku LIN
  • Publication number: 20230092278
    Abstract: The invention discloses a method of improving a wire structure of a circuit board, comprising the following steps: providing a multi-layer circuit board, including an inner circuit and a surface circuit; forming an opening to expose the inner circuit; forming a first circuit layer in the opening; removing the first circuit layer, the first conductive circuit, and the surface circuit on the multi-layer circuit board and removing a part of the first circuit layer in the opening; forming an adhesion promoter layer in the opening and on the multi-layer circuit board; forming a second conductive circuit on the adhesion promoter layer and on the first conductive circuit layer in the opening; forming a photoresist layer on the second conductive circuit layer; forming a second circuit layer in the opening and on the multi-layer circuit board, and removing the photoresist layer and a part of the second conductive circuit.
    Type: Application
    Filed: October 14, 2021
    Publication date: March 23, 2023
    Inventors: Chun Yi Kuo, JIA HAO LIANG, Ching Ku Lin