Patents by Inventor Ching-Kuang Tzuang
Ching-Kuang Tzuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8279020Abstract: The invention discloses the variable attenuator with characteristics, comprising wide attenuation ranges; syntheses on group delays, and low variation of the group delay. The building blocks, which construct the variable attenuator, comprise internal matching networks, external matching networks, delay networks, protecting networks, biasing network, a power combining network, and variable impedance networks. The elements, which realize the internal matching networks, external matching networks, signal combining networks, comprise resistor, inductor, capacitor, and transmission lines. The elements, which realize the variable impedance networks, comprise n-channel field-effect transistor (FET), p-channel FET, n-type bipolar junction transistor (BJT), and p-type BJT. The elements of the variable attenuator can be either integrated on a semiconductor chip by using system-on-chip (SOC) technologies.Type: GrantFiled: June 7, 2010Date of Patent: October 2, 2012Assignee: National Taiwan UniversityInventors: Ching-Kuang Tzuang, Chao-Wei Wang, Shian-Shun Wu
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Patent number: 8183961Abstract: The present invention provides a complementary-conducting-strip (CCS) structure for miniaturizing microwave transmission line. The CCS structure comprises a substrate; a transmission part formed on the substrate, the transmission part consisted of M metal layers and at least one connecting arm extending from the metal layers to connect to an adjacent CCS structure, the M metal layers interlaminated M?1 dielectric layer(s) perforating a plurality of first metal vias to connect the M metal layers, wherein M?2 and M is a nature number; and a frame part formed on the substrate, the frame part surrounding the transmission part and consisted of M?1 metal frame(s), the M?1 metal frame(s) interlaminated M?2 dielectric frame(s) perforating a plurality of second metal vias to connect the metal frames.Type: GrantFiled: December 5, 2008Date of Patent: May 22, 2012Assignees: National Taiwan University, CMSC, Inc.Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
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Patent number: 8106721Abstract: A multilayer complementary-conducting-strip transmission line (CCS TL) structure is disclosed herein. The multilayer CCS TL structure includes a substrate, and n signal transmission lines being parallel and interlacing with n-1 mesh ground plane(s), therein a plurality of inter-media-dielectric (IMD) layers are correspondingly stacked with among the n signal transmission lines and the n-1 mesh ground plane(s) to form a stack structure on the substrate, therein n?2 and n is a natural number. Whereby, a multilayer CCS TL with independent of each layer and complete effect on signal shield is formed to provide more flexible for circuit design, reduce the circuit area and also diminish the transmission loss.Type: GrantFiled: July 23, 2009Date of Patent: January 31, 2012Assignees: National Taiwan University, CMSC, Inc.Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
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Patent number: 8106729Abstract: This invention discloses a complementary-conducting-strip transmission line (CCS TL) structure. The CCS TL structure includes a substrate, at least one first mesh ground plane, m second mesh ground planes having m first inter-media-dielectric (IMD) layers interlaced with and stacked among each other and the first mesh ground plane to form a stack structure on the substrate, a second IMD layer being on the stack structure, and a signal transmission line being on the second IMD layer. Wherein, each first IMD layer has a plurality of vias to correspondingly connect the first and the m second mesh ground planes, therein, m?2 and m is a natural number, and the m second mesh ground planes under the signal transmission line have at least one slit structure.Type: GrantFiled: July 24, 2009Date of Patent: January 31, 2012Assignees: National Taiwan University, CMSC, Inc.Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
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Patent number: 8085113Abstract: This invention discloses a complementary-conducting-strip coupled-line (CCS CL). The CCS CL includes a substrate, m layers of mesh ground planes interlacing with m?1 layer(s) of first inter-media-dielectric (IMD) to form a stack structure on the substrate, a second IMD layer being on the stack structure, and n metal lines being on the second IMD layer and being edge-coupled with each other. Wherein, the m?1 first IMD layer(s) has(have) a plurality of vias to connect matching mesh ground planes, therein, m?2 and m is a natural number, n?2 and n is a natural number.Type: GrantFiled: June 15, 2009Date of Patent: December 27, 2011Assignees: National Taiwan University, CMSC, Inc.Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
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Publication number: 20110298569Abstract: The invention discloses the variable attenuator with characteristics, comprising wide attenuation ranges; syntheses on group delays, and low variation of the group delay. The building blocks, which construct the variable attenuator, comprise internal matching networks, external matching networks, delay networks, protecting networks, biasing network, a power combining network, and variable impedance networks. The elements, which realize the internal matching networks, external matching networks, signal combining networks, comprise resistor, inductor, capacitor, and transmission lines. The elements, which realize the variable impedance networks, comprise n-channel field-effect transistor (FET), p-channel FET, n-type bipolar junction transistor (BJT), and p-type BJT. The elements of the variable attenuator can be either integrated on a semiconductor chip by using system-on-chip (SOC) technologies.Type: ApplicationFiled: June 7, 2010Publication date: December 8, 2011Inventors: Ching-Kuang Tzuang, Chao-Wei Wang, Shian-Shun Wu
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Publication number: 20100148885Abstract: This invention discloses a complementary-conducting-strip coupled-line (CCS CL). The CCS CL includes a substrate, m layers of mesh ground planes interlacing with m?1 layer(s) of first inter-media-dielectric (IMD) to form a stack structure on the substrate, a second IMD layer being on the stack structure, and n metal lines being on the second IMD layer and being edge-coupled with each other. Wherein, the m?1 first IMD layer(s) has(have) a plurality of vias to connect matching mesh ground planes, therein, m?2 and m is a nature number, n?2 and n is a nature number.Type: ApplicationFiled: June 15, 2009Publication date: June 17, 2010Applicants: NATIONAL TAIWAN UNIVERSITY, CMSC, INC.Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
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Publication number: 20100141359Abstract: The present invention provides a complementary-conducting-strip (CCS) structure for miniaturizing microwave transmission line. The CCS structure comprises a substrate; a transmission part formed on the substrate, the transmission part consisted of M metal layers and at least one connecting arm extending from the metal layers to connect to an adjacent CCS structure, the M metal layers interlaminated M-1 dielectric layer(s) perforating a plurality of first metal vias to connect the M metal layers, wherein M?=2 and M is a nature number; and a frame part formed on the substrate, the frame part surrounding the transmission part and consisted of M-1 metal frame(s), the M-1 metal frame(s) interlaminated M-2 dielectric frame(s) perforating a plurality of second metal vias to connect the metal frames.Type: ApplicationFiled: December 5, 2008Publication date: June 10, 2010Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
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Publication number: 20100109790Abstract: A multilayer complementary-conducting-strip transmission line (CCS TL) structure is disclosed herein. The multilayer CCS TL structure includes a substrate, and n signal transmission lines being parallel and interlacing with n-1 mesh ground plane(s), therein a plurality of inter-media-dielectric (IMD) layers are correspondingly stacked with among the n signal transmission lines and the n-1 mesh ground plane(s) to form a stack structure on the substrate, therein n?2 and n is a natural number. Whereby, a multilayer CCS TL with independent of each layer and complete effect on signal shield is formed to provide more flexible for circuit design, reduce the circuit area and also diminish the transmission loss.Type: ApplicationFiled: July 23, 2009Publication date: May 6, 2010Applicants: NATIONAL TAIWAN UNIVERSITY, CMSC, INC.Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
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Publication number: 20100109816Abstract: This invention discloses a complementary-conducting-strip transmission line (CCS TL) structure. The CCS TL structure includes a substrate, at least one first mesh ground plane, m second mesh ground planes having m first inter-media-dielectric (IMD) layers interlaced with and stacked among each other and the first mesh ground plane to form a stack structure on the substrate, a second IMD layer being on the stack structure, and a signal transmission line being on the second IMD layer. Wherein, each first IMD layer has a plurality of vias to correspondingly connect the first and the m second mesh ground planes, therein, m?2 and m is a nature number, and the m second mesh ground planes under the signal transmission line have at least one slit structure.Type: ApplicationFiled: July 24, 2009Publication date: May 6, 2010Applicants: National Taiwan University, CMSC, INC.Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
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Patent number: 7026886Abstract: The invention discloses a two-dimensional array waveguide structure implemented with multi-layer process or monolithic integrated circuit process. The structure includes a first metal layer, a second metal layer and a dielectric layer. The dielectric layer lain between the first and the second metal layer is for isolating the first metal layer from the second metal layer. The first metal layer and the second metal layer respectively formed from a plurality of first unit cells and second unit cells arranged in rows and columns create the two-dimensional array waveguide structure. The first metal layer consists of a main body and a plurality of connecting arms, whereas the second metal layer consists of a metal wire loop. The second metal layer is located below the first metal layer, and each second unit cell corresponds to each first unit cell in a one-on-one manner to further build a complete unit cell.Type: GrantFiled: October 9, 2003Date of Patent: April 11, 2006Assignee: National Chiao Tung UniversityInventors: Ching-kuang Tzuang, Chih-chiang Chen
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Publication number: 20050077979Abstract: The invention discloses a two-dimensional array waveguide structure implemented with multi-layer process or monolithic integrated circuit process. The structure includes a first metal layer, a second metal layer and a dielectric layer. The dielectric layer lain between the first and the second metal layer is for isolating the first metal layer from the second metal layer. The first metal layer and the second metal layer respectively formed from a plurality of first unit cells and second unit cells arranged in rows and columns create the two-dimensional array waveguide structure. The first metal layer consists of a main body and a plurality of connecting arms, whereas the second metal layer consists of a metal wire loop. The second metal layer is located below the first metal layer, and each second unit cell corresponds to each first unit cell in a one-on-one manner to further build a complete unit cell.Type: ApplicationFiled: October 9, 2003Publication date: April 14, 2005Inventors: Ching-Kuang Tzuang, Chih-Chiang Chen
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Patent number: 6639484Abstract: A planar mode converter includes a rectangular waveguide, a microstrip feed-in circuit, and a microstrip feed-out circuit. The rectangular waveguide is filled with dielectric layers and surrounded with metal materials. The lowermost dielectric layer has usually largest thickness and dielectric constant. Except for the lowermost dielectric layer, each of the dielectric layers has a rectangular aperture at its front-end and back-end, respectively. The microstrip feed-in circuit is constituted by first, second and third metal strips, and a feed-in metal ground plane. The first metal strip and the feed-in metal ground plane form a feed-in signal line. The first, second and third metal strips are adhered to the top surface of the lowermost dielectric layer, and the feed-in metal ground plane is adhered to the bottom surface of the lowermost dielectric layer. The microstrip feed-out circuit is constituted of fourth, fifth and sixth metal strips, and a feed-out metal ground plane.Type: GrantFiled: June 7, 2002Date of Patent: October 28, 2003Assignee: National Chiao Tung UniversityInventors: Ching-kuang Tzuang, Cheng-jung Lee
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Patent number: 6452461Abstract: A high-speed power-efficient coded M-ary Frequency-Shift Keying (M-ary FSK) modulator. The modulator includes a coding logic, which generates (M/2) Gray code signals in accordance with an (N−1) bits control signal; and (M/2) switching oscillators. Each switching oscillator includes: a composite crystal resonator with a first end and a second end; a first switch, which is controlled by Gray code signals, with one end connected to the first end of the composite crystal resonator, and the other end grounded via an equivalent negative resistance circuit; a second switch, which is controlled by serial data, with one end connected to the second end of the composite crystal resonator, and the other end grounded; and a capacitor, with one end connected to the second end of the composite crystal resonator, and the other end grounded.Type: GrantFiled: July 11, 2001Date of Patent: September 17, 2002Assignee: Tricome Microwave Electronics Corp.Inventors: Ching-Hsiang Su, Ching-Kuang Tzuang
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Publication number: 20020039053Abstract: A high-speed power-efficient coded M-ary Frequency-Shift Keying (M-ary FSK) modulator. The modulator includes a coding logic, which generates (M/2) Gray code signals in accordance with an (N−1) bits control signal; and (M/2) switching oscillators. Each switching oscillator includes: a composite crystal resonator with a first end and a second end; a first switch, which is controlled by Gray code signals, with one end connected to the first end of the composite crystal resonator, and the other end grounded via an equivalent negative resistance circuit; a second switch, which is controlled by serial data, with one end connected to the second end of the composite crystal resonator, and the other end grounded; and a capacitor, with one end connected to the second end of the composite crystal resonator, and the other end grounded.Type: ApplicationFiled: July 11, 2001Publication date: April 4, 2002Inventors: Ching-Hsiang Su, Ching-Kuang Tzuang
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Patent number: 6239749Abstract: An antenna based on the resonance phenomena of a fast-wave leaky mode is small in size, can be installed in a printed circuit board by using surface mounting technology, and can use dielectric materials with a relative permittivity of between 2 and 5.Type: GrantFiled: January 29, 1999Date of Patent: May 29, 2001Assignee: Ching-Kuang TzuangInventors: Ching-Kuang Tzuang, Tsan-Hsi Lin
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Patent number: 5930696Abstract: An RF receiver apparatus that is suitable for implementation as a monolithic IC core with minimum external components is disclosed. The receiver apparatus features low noise figure, low intermodulation and almost fixed input impedance over a broad frequency band covering cable TV, broadcast TV, direct broadcast satellite TV. Other outstanding features includes 40 dB dynamic gain controllable range and minimum electromagnetic radiation due to fully differential signal design. Above all, due to the highly integrated design of the invention, it is suitable for miniaturized tuner appliation.Type: GrantFiled: July 25, 1997Date of Patent: July 27, 1999Assignees: Ching-Kuang Tzuang, Chen-Hwa Lin, Tsan-Hsi LinInventors: Ching-Kuang Tzuang, Chen-Hwa Lin, Tsan-Hsi Lin
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Patent number: 5783847Abstract: A dual-mode microwave/millimeter wave integrated circuit package with low cost, high operating frequency, quick cooling, and high reliability is disclosed. More particularly, the package structure of the invention supports both microstrip and coplanar waveguide operation modes, which cannot be accomplished by any prior microwave integrated circuit package structures.Type: GrantFiled: August 18, 1997Date of Patent: July 21, 1998Assignee: Ching-Kuang TzuangInventor: Ching-Kuang Tzuang