Patents by Inventor Ching-Kuang Tzuang

Ching-Kuang Tzuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8279020
    Abstract: The invention discloses the variable attenuator with characteristics, comprising wide attenuation ranges; syntheses on group delays, and low variation of the group delay. The building blocks, which construct the variable attenuator, comprise internal matching networks, external matching networks, delay networks, protecting networks, biasing network, a power combining network, and variable impedance networks. The elements, which realize the internal matching networks, external matching networks, signal combining networks, comprise resistor, inductor, capacitor, and transmission lines. The elements, which realize the variable impedance networks, comprise n-channel field-effect transistor (FET), p-channel FET, n-type bipolar junction transistor (BJT), and p-type BJT. The elements of the variable attenuator can be either integrated on a semiconductor chip by using system-on-chip (SOC) technologies.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: October 2, 2012
    Assignee: National Taiwan University
    Inventors: Ching-Kuang Tzuang, Chao-Wei Wang, Shian-Shun Wu
  • Patent number: 8183961
    Abstract: The present invention provides a complementary-conducting-strip (CCS) structure for miniaturizing microwave transmission line. The CCS structure comprises a substrate; a transmission part formed on the substrate, the transmission part consisted of M metal layers and at least one connecting arm extending from the metal layers to connect to an adjacent CCS structure, the M metal layers interlaminated M?1 dielectric layer(s) perforating a plurality of first metal vias to connect the M metal layers, wherein M?2 and M is a nature number; and a frame part formed on the substrate, the frame part surrounding the transmission part and consisted of M?1 metal frame(s), the M?1 metal frame(s) interlaminated M?2 dielectric frame(s) perforating a plurality of second metal vias to connect the metal frames.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: May 22, 2012
    Assignees: National Taiwan University, CMSC, Inc.
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Patent number: 8106729
    Abstract: This invention discloses a complementary-conducting-strip transmission line (CCS TL) structure. The CCS TL structure includes a substrate, at least one first mesh ground plane, m second mesh ground planes having m first inter-media-dielectric (IMD) layers interlaced with and stacked among each other and the first mesh ground plane to form a stack structure on the substrate, a second IMD layer being on the stack structure, and a signal transmission line being on the second IMD layer. Wherein, each first IMD layer has a plurality of vias to correspondingly connect the first and the m second mesh ground planes, therein, m?2 and m is a natural number, and the m second mesh ground planes under the signal transmission line have at least one slit structure.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: January 31, 2012
    Assignees: National Taiwan University, CMSC, Inc.
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Patent number: 8106721
    Abstract: A multilayer complementary-conducting-strip transmission line (CCS TL) structure is disclosed herein. The multilayer CCS TL structure includes a substrate, and n signal transmission lines being parallel and interlacing with n-1 mesh ground plane(s), therein a plurality of inter-media-dielectric (IMD) layers are correspondingly stacked with among the n signal transmission lines and the n-1 mesh ground plane(s) to form a stack structure on the substrate, therein n?2 and n is a natural number. Whereby, a multilayer CCS TL with independent of each layer and complete effect on signal shield is formed to provide more flexible for circuit design, reduce the circuit area and also diminish the transmission loss.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: January 31, 2012
    Assignees: National Taiwan University, CMSC, Inc.
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Patent number: 8085113
    Abstract: This invention discloses a complementary-conducting-strip coupled-line (CCS CL). The CCS CL includes a substrate, m layers of mesh ground planes interlacing with m?1 layer(s) of first inter-media-dielectric (IMD) to form a stack structure on the substrate, a second IMD layer being on the stack structure, and n metal lines being on the second IMD layer and being edge-coupled with each other. Wherein, the m?1 first IMD layer(s) has(have) a plurality of vias to connect matching mesh ground planes, therein, m?2 and m is a natural number, n?2 and n is a natural number.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: December 27, 2011
    Assignees: National Taiwan University, CMSC, Inc.
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Publication number: 20110298569
    Abstract: The invention discloses the variable attenuator with characteristics, comprising wide attenuation ranges; syntheses on group delays, and low variation of the group delay. The building blocks, which construct the variable attenuator, comprise internal matching networks, external matching networks, delay networks, protecting networks, biasing network, a power combining network, and variable impedance networks. The elements, which realize the internal matching networks, external matching networks, signal combining networks, comprise resistor, inductor, capacitor, and transmission lines. The elements, which realize the variable impedance networks, comprise n-channel field-effect transistor (FET), p-channel FET, n-type bipolar junction transistor (BJT), and p-type BJT. The elements of the variable attenuator can be either integrated on a semiconductor chip by using system-on-chip (SOC) technologies.
    Type: Application
    Filed: June 7, 2010
    Publication date: December 8, 2011
    Inventors: Ching-Kuang Tzuang, Chao-Wei Wang, Shian-Shun Wu
  • Publication number: 20100148885
    Abstract: This invention discloses a complementary-conducting-strip coupled-line (CCS CL). The CCS CL includes a substrate, m layers of mesh ground planes interlacing with m?1 layer(s) of first inter-media-dielectric (IMD) to form a stack structure on the substrate, a second IMD layer being on the stack structure, and n metal lines being on the second IMD layer and being edge-coupled with each other. Wherein, the m?1 first IMD layer(s) has(have) a plurality of vias to connect matching mesh ground planes, therein, m?2 and m is a nature number, n?2 and n is a nature number.
    Type: Application
    Filed: June 15, 2009
    Publication date: June 17, 2010
    Applicants: NATIONAL TAIWAN UNIVERSITY, CMSC, INC.
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Publication number: 20100141359
    Abstract: The present invention provides a complementary-conducting-strip (CCS) structure for miniaturizing microwave transmission line. The CCS structure comprises a substrate; a transmission part formed on the substrate, the transmission part consisted of M metal layers and at least one connecting arm extending from the metal layers to connect to an adjacent CCS structure, the M metal layers interlaminated M-1 dielectric layer(s) perforating a plurality of first metal vias to connect the M metal layers, wherein M?=2 and M is a nature number; and a frame part formed on the substrate, the frame part surrounding the transmission part and consisted of M-1 metal frame(s), the M-1 metal frame(s) interlaminated M-2 dielectric frame(s) perforating a plurality of second metal vias to connect the metal frames.
    Type: Application
    Filed: December 5, 2008
    Publication date: June 10, 2010
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Publication number: 20100109790
    Abstract: A multilayer complementary-conducting-strip transmission line (CCS TL) structure is disclosed herein. The multilayer CCS TL structure includes a substrate, and n signal transmission lines being parallel and interlacing with n-1 mesh ground plane(s), therein a plurality of inter-media-dielectric (IMD) layers are correspondingly stacked with among the n signal transmission lines and the n-1 mesh ground plane(s) to form a stack structure on the substrate, therein n?2 and n is a natural number. Whereby, a multilayer CCS TL with independent of each layer and complete effect on signal shield is formed to provide more flexible for circuit design, reduce the circuit area and also diminish the transmission loss.
    Type: Application
    Filed: July 23, 2009
    Publication date: May 6, 2010
    Applicants: NATIONAL TAIWAN UNIVERSITY, CMSC, INC.
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Publication number: 20100109816
    Abstract: This invention discloses a complementary-conducting-strip transmission line (CCS TL) structure. The CCS TL structure includes a substrate, at least one first mesh ground plane, m second mesh ground planes having m first inter-media-dielectric (IMD) layers interlaced with and stacked among each other and the first mesh ground plane to form a stack structure on the substrate, a second IMD layer being on the stack structure, and a signal transmission line being on the second IMD layer. Wherein, each first IMD layer has a plurality of vias to correspondingly connect the first and the m second mesh ground planes, therein, m?2 and m is a nature number, and the m second mesh ground planes under the signal transmission line have at least one slit structure.
    Type: Application
    Filed: July 24, 2009
    Publication date: May 6, 2010
    Applicants: National Taiwan University, CMSC, INC.
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Patent number: 7026886
    Abstract: The invention discloses a two-dimensional array waveguide structure implemented with multi-layer process or monolithic integrated circuit process. The structure includes a first metal layer, a second metal layer and a dielectric layer. The dielectric layer lain between the first and the second metal layer is for isolating the first metal layer from the second metal layer. The first metal layer and the second metal layer respectively formed from a plurality of first unit cells and second unit cells arranged in rows and columns create the two-dimensional array waveguide structure. The first metal layer consists of a main body and a plurality of connecting arms, whereas the second metal layer consists of a metal wire loop. The second metal layer is located below the first metal layer, and each second unit cell corresponds to each first unit cell in a one-on-one manner to further build a complete unit cell.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: April 11, 2006
    Assignee: National Chiao Tung University
    Inventors: Ching-kuang Tzuang, Chih-chiang Chen
  • Publication number: 20050077979
    Abstract: The invention discloses a two-dimensional array waveguide structure implemented with multi-layer process or monolithic integrated circuit process. The structure includes a first metal layer, a second metal layer and a dielectric layer. The dielectric layer lain between the first and the second metal layer is for isolating the first metal layer from the second metal layer. The first metal layer and the second metal layer respectively formed from a plurality of first unit cells and second unit cells arranged in rows and columns create the two-dimensional array waveguide structure. The first metal layer consists of a main body and a plurality of connecting arms, whereas the second metal layer consists of a metal wire loop. The second metal layer is located below the first metal layer, and each second unit cell corresponds to each first unit cell in a one-on-one manner to further build a complete unit cell.
    Type: Application
    Filed: October 9, 2003
    Publication date: April 14, 2005
    Inventors: Ching-Kuang Tzuang, Chih-Chiang Chen
  • Patent number: 6639484
    Abstract: A planar mode converter includes a rectangular waveguide, a microstrip feed-in circuit, and a microstrip feed-out circuit. The rectangular waveguide is filled with dielectric layers and surrounded with metal materials. The lowermost dielectric layer has usually largest thickness and dielectric constant. Except for the lowermost dielectric layer, each of the dielectric layers has a rectangular aperture at its front-end and back-end, respectively. The microstrip feed-in circuit is constituted by first, second and third metal strips, and a feed-in metal ground plane. The first metal strip and the feed-in metal ground plane form a feed-in signal line. The first, second and third metal strips are adhered to the top surface of the lowermost dielectric layer, and the feed-in metal ground plane is adhered to the bottom surface of the lowermost dielectric layer. The microstrip feed-out circuit is constituted of fourth, fifth and sixth metal strips, and a feed-out metal ground plane.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: October 28, 2003
    Assignee: National Chiao Tung University
    Inventors: Ching-kuang Tzuang, Cheng-jung Lee
  • Patent number: 6452461
    Abstract: A high-speed power-efficient coded M-ary Frequency-Shift Keying (M-ary FSK) modulator. The modulator includes a coding logic, which generates (M/2) Gray code signals in accordance with an (N−1) bits control signal; and (M/2) switching oscillators. Each switching oscillator includes: a composite crystal resonator with a first end and a second end; a first switch, which is controlled by Gray code signals, with one end connected to the first end of the composite crystal resonator, and the other end grounded via an equivalent negative resistance circuit; a second switch, which is controlled by serial data, with one end connected to the second end of the composite crystal resonator, and the other end grounded; and a capacitor, with one end connected to the second end of the composite crystal resonator, and the other end grounded.
    Type: Grant
    Filed: July 11, 2001
    Date of Patent: September 17, 2002
    Assignee: Tricome Microwave Electronics Corp.
    Inventors: Ching-Hsiang Su, Ching-Kuang Tzuang
  • Publication number: 20020039053
    Abstract: A high-speed power-efficient coded M-ary Frequency-Shift Keying (M-ary FSK) modulator. The modulator includes a coding logic, which generates (M/2) Gray code signals in accordance with an (N−1) bits control signal; and (M/2) switching oscillators. Each switching oscillator includes: a composite crystal resonator with a first end and a second end; a first switch, which is controlled by Gray code signals, with one end connected to the first end of the composite crystal resonator, and the other end grounded via an equivalent negative resistance circuit; a second switch, which is controlled by serial data, with one end connected to the second end of the composite crystal resonator, and the other end grounded; and a capacitor, with one end connected to the second end of the composite crystal resonator, and the other end grounded.
    Type: Application
    Filed: July 11, 2001
    Publication date: April 4, 2002
    Inventors: Ching-Hsiang Su, Ching-Kuang Tzuang
  • Patent number: 6239749
    Abstract: An antenna based on the resonance phenomena of a fast-wave leaky mode is small in size, can be installed in a printed circuit board by using surface mounting technology, and can use dielectric materials with a relative permittivity of between 2 and 5.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: May 29, 2001
    Assignee: Ching-Kuang Tzuang
    Inventors: Ching-Kuang Tzuang, Tsan-Hsi Lin
  • Patent number: 5930696
    Abstract: An RF receiver apparatus that is suitable for implementation as a monolithic IC core with minimum external components is disclosed. The receiver apparatus features low noise figure, low intermodulation and almost fixed input impedance over a broad frequency band covering cable TV, broadcast TV, direct broadcast satellite TV. Other outstanding features includes 40 dB dynamic gain controllable range and minimum electromagnetic radiation due to fully differential signal design. Above all, due to the highly integrated design of the invention, it is suitable for miniaturized tuner appliation.
    Type: Grant
    Filed: July 25, 1997
    Date of Patent: July 27, 1999
    Assignees: Ching-Kuang Tzuang, Chen-Hwa Lin, Tsan-Hsi Lin
    Inventors: Ching-Kuang Tzuang, Chen-Hwa Lin, Tsan-Hsi Lin
  • Patent number: 5783847
    Abstract: A dual-mode microwave/millimeter wave integrated circuit package with low cost, high operating frequency, quick cooling, and high reliability is disclosed. More particularly, the package structure of the invention supports both microstrip and coplanar waveguide operation modes, which cannot be accomplished by any prior microwave integrated circuit package structures.
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: July 21, 1998
    Assignee: Ching-Kuang Tzuang
    Inventor: Ching-Kuang Tzuang