Patents by Inventor Ching LU

Ching LU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978947
    Abstract: A Rugged portable device comprises: a base, a cover pivotally connected to the base, a first antenna unit, a second antenna unit, and a control unit. The first antenna unit and the second antenna unit are respectively disposed at an edge of the cover and an edge of the base, and the first antenna unit and the second antenna unit respectively have a near-field antenna and a far-field antenna. When the cover pivots relative to the base and is close to the base, the near-field antenna disposed at the cover and the near-field antenna disposed at the base generate a near-field communication (NFC) sensing signal and the near-field communication sensing signal is transmitted to the control unit. Therefore, the control unit sets up one of functions in the rugged portable device. For instance, the control unit switches off and/or switches on the far-field antenna or a peripheral unit (a keyboard or a camera).
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: May 7, 2024
    Assignee: Winmate Inc.
    Inventors: Ku-Ching Lu, Wei-Wen Yang, Hsin-Chin Wang, Chun-Yu Huang
  • Patent number: 11971565
    Abstract: An absorption type near-infrared filter comprising a first multilayer film, a second multilayer film, and an absorption film, wherein in the ultraviolet band, the difference of between the wavelength with the transmittance at 80% of the absorbing film and the wavelength with the reflectivity at 80% of the first multilayer film falls in the range between 25 nm and 37 nm, the difference of between the wavelength with the transmittance at 50% of the absorbing film and the wavelength with the reflectivity at 50% of the first multilayer film falls in the range between 6 nm and 14 nm, and the difference of between the wavelength with the transmittance at 20% of the absorbing film and the wavelength with the reflectivity at 20% of the first multilayer film falls in the range between ?6 nm and 2.5 nm.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: April 30, 2024
    Assignees: PTOT (SUZHOU) INC., PLATINUM OPTICS TECHNOLOGY INC.
    Inventors: Chung-Han Lu, Hsiao-Ching Shen, Chun-Cheng Hsieh, Ming-Zhan Wang
  • Patent number: 11967546
    Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shang-Yun Hou, Hsien-Pin Hu, Sao-Ling Chiu, Wen-Hsin Wei, Ping-Kang Huang, Chih-Ta Shen, Szu-Wei Lu, Ying-Ching Shih, Wen-Chih Chiou, Chi-Hsi Wu, Chen-Hua Yu
  • Patent number: 11961912
    Abstract: The present application provides a semiconductor device and the method of making the same. The method includes recessing a fin extending from a substrate, forming a base epitaxial feature on the recessed fin, forming a bar-like epitaxial feature on the base epitaxial feature, and forming a conformal epitaxial feature on the bar-like epitaxial feature. The forming of the bar-like epitaxial feature includes in-situ doping the bar-like epitaxial feature with an n-type dopant at a first doping concentration. The forming of the conformal epitaxial feature includes in-situ doping the conformal epitaxial feature with a second doping concentration greater than the first doping concentration.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-An Lin, Wei-Yuan Lu, Feng-Cheng Yang, Tzu-Ching Lin, Li-Li Su
  • Patent number: 11955459
    Abstract: A package structure is provided. The package structure includes a first die and a second die, a dielectric layer, a bridge, an encapsulant, and a redistribution layer structure. The dielectric layer is disposed on the first die and the second die. The bridge is electrically connected to the first die and the second die, wherein the dielectric layer is spaced apart from the bridge. The encapsulant is disposed on the dielectric layer and laterally encapsulating the bridge. The redistribution layer structure is disposed over the encapsulant and the bridge. A top surface of the bridge is in contact with the RDL structure.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shu-Hang Liao, Chih-Wei Wu, Jing-Cheng Lin, Szu-Wei Lu, Ying-Ching Shih
  • Publication number: 20240109748
    Abstract: An optical fiber winding machine with full-time tension control function is provided. The machine includes a first wire storage ring, a first tension sensing module, a first revolution plate, a first rotary servo motor, a first moving assembly, a plurality of first docking elements, a plurality of first electrical connection modules, a second wire storage ring, a second tension sensing module, a second revolution plate, a second rotary servo motor, a second moving assembly, a plurality of second docking elements, a plurality of second electrical connection modules, a rotating shaft, an optical fiber winding ring, and a control module.
    Type: Application
    Filed: January 7, 2023
    Publication date: April 4, 2024
    Inventors: CHING-LU HSIEH, SHIH-JU FAN, HUNG-PIN CHUNG
  • Publication number: 20240105515
    Abstract: A method includes forming a first low-dimensional layer over an isolation layer, forming a first insulator over the first low-dimensional layer, forming a second low-dimensional layer over the first insulator, forming a second insulator over the second low-dimensional layer, and patterning the first low-dimensional layer, the first insulator, the second low-dimensional layer, and the second insulator into a protruding fin. Remaining portions of the first low-dimensional layer, the first insulator, the second low-dimensional layer, and the second insulator form a first low-dimensional strip, a first insulator strip, a second low-dimensional strip, and a second insulator strip, respectively. A transistor is then formed based on the protruding fin.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 28, 2024
    Inventors: Chao-Ching Cheng, Tzu-Ang Chao, Chun-Chieh Lu, Hung-Li Chiang, Tzu-Chiang Chen, Lain-Jong Li
  • Publication number: 20240096893
    Abstract: A semiconductor device includes a substrate. The semiconductor device includes a fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate structure that straddles the fin and extends along a second direction perpendicular to the first direction. The semiconductor device includes a first source/drain structure coupled to a first end of the fin along the first direction. The gate structure includes a first portion protruding toward the first source/drain structure along the first direction. A tip edge of the first protruded portion is vertically above a bottom surface of the gate structure.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shih-Yao Lin, Chao-Cheng Chen, Chih-Han Lin, Ming-Ching Chang, Wei-Liang Lu, Kuei-Yu Kao
  • Publication number: 20240090230
    Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Ling Lu, Chen-Jun Wu, Ya-Yun Cheng, Sheng-Chih Lai, Yi-Ching Liu, Yu-Ming Lin, Feng-Cheng Yang, Chung-Te Lin
  • Publication number: 20240086611
    Abstract: Systems, methods and devices are provided, which can include an engineering change order (ECO) base. A base layout cell includes metal layer regions, conductive gate patterns arranged above metal layer regions; oxide definition (OD) patterns, metal-zero layer over oxide-definition (metal-zero) patterns, at least one cut metal layer (CMD) pattern; and at least one via region. The base layout cell can be implemented in at least two non-identical functional cells. A first functional cell of the at least two non-identical functional cells includes first interconnection conductive patterns arranged connecting metal-zero structures corresponding to at least two metal-zero patterns in a first layout, and a second functional cell of the at least two non-identical functional cells includes second interconnection conductive patterns arranged connecting metal-zero structures corresponding to at least two metal-zero patterns in a second layout.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shang-Hsuan Chiu, Chih-Liang Chen, Hui-Zhong Zhuang, Chi-Yu Lu, Kuang-Ching Chang
  • Patent number: 11928971
    Abstract: A method includes obtaining a plurality of data sets, where each data set of the plurality of data sets includes multivariate time series data for a respective sample period of a plurality of sample periods. The method also includes, for each data set of the plurality of data sets, determining recurrence data indicative of recurrent states in the data set and determining, based on the recurrence data, determinism values of a determinism metric and laminarity values of a laminarity metric. The method further includes determining that a particular data set of the plurality of data sets includes data representing an anomalous state based on a determinism-laminarity curve representing the particular data set, where the determinism-laminarity curve is based on the determinism values of the particular data set and the laminarity values of the particular data set. The method also includes generating output data indicating the anomalous state.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: March 12, 2024
    Assignee: BOEING COMPANY
    Inventors: Nigel Stepp, Tsai-Ching Lu, Franz David Betz
  • Patent number: 11929288
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jhe-Ching Lu, Bao-Ru Young, Yen-Sen Wang, Tsung-Chieh Tsai
  • Patent number: 11923337
    Abstract: A method of manufacturing a carrying substrate is provided. At least one circuit component is disposed on a first circuit structure. An encapsulation layer is formed on the first circuit structure and encapsulates the circuit component. A second circuit structure is formed on the encapsulation layer and electrically connected to the circuit component. The circuit component is embedded in the encapsulation layer via an existing packaging process. Therefore, the routing area is increased, and a package substrate requiring a large size has a high yield and low manufacturing cost.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: March 5, 2024
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chi-Ching Ho, Bo-Hao Ma, Yu-Ting Xue, Ching-Hung Tseng, Guan-Hua Lu, Hong-Da Chang
  • Patent number: 11924964
    Abstract: Devices and methods are described for reducing etching due to Galvanic Effect within a printed circuit board (PCB) that may be used in an electronic device. Specifically, a contact trace is coupled to a contact finger that has a substantially larger surface area than the contact trace. The contact finger is configured to couple the electronic device to a host device. The contact trace is electrically isolated from the rest of the PCB circuitry during a fabrication process by a separation distance between an exposed portion of the contact trace and an impedance trace. The contact finger and the exposed portion of the contact trace are plated with a common material to reduce galvanic etching of the contact trace during fabrication. The contact trace is then connected to the impedance trace using a solder joint.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: March 5, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Lin Hui Chen, Songtao Lu, Chien Te Chen, Yu Ying Tan, Huang Pao Yi, Ching Chuan Hsieh, T. Sharanya Kaminda, Chia-Hsuan Huang
  • Publication number: 20240071849
    Abstract: A semiconductor package including one or more dam structures and the method of forming are provided. A semiconductor package may include an interposer, a semiconductor die bonded to a first side of the interposer, an encapsulant on the first side of the interposer encircling the semiconductor die, a substrate bonded to the a second side of the interposer, an underfill between the interposer and the substrate, and one or more of dam structures on the substrate. The one or more dam structures may be disposed adjacent respective corners of the interposer and may be in direct contact with the underfill. The coefficient of thermal expansion of the one or more of dam structures may be smaller than the coefficient of thermal expansion of the underfill.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Jian-You Chen, Kuan-Yu Huang, Li-Chung Kuo, Chen-Hsuan Tsai, Kung-Chen Yeh, Hsien-Ju Tsou, Ying-Ching Shih, Szu-Wei Lu
  • Patent number: 11907833
    Abstract: A method includes receiving input data including a plurality of feature vectors and labeling each feature vector based on a temporal proximity of the feature vector to occurrence of a fault. Feature vectors that are within a threshold temporal proximity to the occurrence of the fault are labeled with a first label value and other feature vectors are labeled with a second label value. The method includes determining, for each feature vector of a subset, a probability that the label associated with the feature vector is correct. The subset includes feature vectors having labels that indicate the first label value. The method includes reassigning labels of one or more feature vectors of the subset having a probability that fails to satisfy a probability threshold and, after reassigning the labels, training an aircraft fault prediction classifier using supervised training data including the plurality of feature vectors and the labels.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: February 20, 2024
    Assignee: THE BOEING COMPANY
    Inventors: Rashmi Sundareswara, Franz David Betz, Tsai-Ching Lu
  • Publication number: 20240023280
    Abstract: An apparatus may include a heat pipe with a first portion residing in a first plane, a second portion residing in the first plane and a third portion positioned between the first portion and the second portion, the third portion residing in a second plane spaced-apart from the first plane. The apparatus further includes a base plate including an opening and a clip plate having a first region, a second region and a third region positioned between the first and the second regions. The third portion of the heat pipe is positioned within the opening, and the clip plate is coupled to the base plate such that i) the third region of the clip plate is in superimposition with the third portion of the heat pipe and ii) third region of the clip plate resides in the first plane.
    Type: Application
    Filed: July 13, 2022
    Publication date: January 18, 2024
    Inventors: CHIN-CHUNG WU, CHUN-HAN LIN, CHE-JUNG CHANG, YUEH CHING LU
  • Patent number: 11847080
    Abstract: An all-in-one computer includes a display, a Universal Serial Bus (USB) Type-C port, a plurality of USB Type-A ports, a USB hub, a demultiplexer, and a Power Delivery (PD) controller. The USB hub is coupled to the plurality of USB Type-A ports. The demultiplexer is coupled between the display, the USB Type-C port, and the USB hub. The PD controller is to control the demultiplexer and the USB hub to pass a display signal input to the USB Type-C port to the display and pass signals input to the USB hub from the plurality of USB Type-A ports to the USB Type-C port with a computing device coupled to the USB Type-C port.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: December 19, 2023
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jui-Hsuan Chang, Chia-Ching Lu, Shih-Chieh Liu, Nam Hoang Nguyen
  • Publication number: 20230394889
    Abstract: A method, apparatus, system, and computer program product for managing a platform. A computer system generates a training dataset comprising historical metric values from historical sensor information for a set of metrics for a part and historical maintenance events for the part. The computer system trains a machine learning model using the training dataset. The computer system determines different maintenance thresholds for maintenance parameters for a metric in the set of metrics for performing maintenance on the part using the machine learning model trained with the training dataset. The computer system selects maintenance thresholds for the maintenance parameters from the maintenance thresholds meeting an objective to form a maintenance plan. The maintenance plan is used to determine when a maintenance action is needed for the part.
    Type: Application
    Filed: June 1, 2022
    Publication date: December 7, 2023
    Inventors: Alexander Waagen, Aruna Jammalamadaka, Alice A. Murphy, Derek S. Fok, Douglas Peter Knapp, Tsai-Ching Lu
  • Publication number: 20230394888
    Abstract: A method, apparatus, system and computer program product for managing a platform. A computer system generates a training dataset comprising historical metric values from historical sensor information for a set of metrics for a part and historical maintenance events for the part. The computer system trains a machine learning model using the training dataset. The computer system determines maintenance thresholds for a metric in the set of metrics for performing maintenance on the part using the machine learning model trained with the training dataset. The computer system selects a maintenance threshold from the maintenance thresholds meeting an objective, wherein the maintenance threshold is used to determine when a maintenance action is needed for the part.
    Type: Application
    Filed: June 1, 2022
    Publication date: December 7, 2023
    Inventors: Alexander Waagen, Tsai-Ching Lu