Patents by Inventor Ching-Lun Chen

Ching-Lun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240106757
    Abstract: A method of wireless signal transmission management includes transmitting a plurality of data packets to tethering equipment from user equipment to tethering equipment, determining a size of each of the plurality of data packets by the tethering equipment, designating data packets of the plurality of data packets having a specific range of sizes as control signal packets by the tethering equipment, and prioritizing in transmitting the control signal packets to a cellular network by the tethering equipment.
    Type: Application
    Filed: September 21, 2023
    Publication date: March 28, 2024
    Applicant: MEDIATEK INC.
    Inventors: Ching-Hao Lee, Yi-Lun Chen, Ho-Wen Pu, Yu-Yu Hung, Jun-Yi Li, Ting-Sheng Lo
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20220085194
    Abstract: The invention provides a self-organized quantum dot semiconductor structure. The quantum dot semiconductor structure includes: a conductive ridge on a substrate; an insulative layer covering the substrate and the conductive ridge, wherein the insulative layer includes a top portion and two sidewalls over the conductive ridge; a semiconductor mechanism of etching back and thermal oxidation, implemented on a semiconductor-alloyed layer set on the insulative layer; a plurality of quantum dots respectively embedded within a plurality of silicon dioxide spacer islands based on the semiconductor mechanism, the quantum dots and the silicon dioxide spacer islands adhered to the sidewalls of the insulative layer; and a plurality of conductive ledges adhered to the silicon dioxide spacer islands, wherein each of the conductive ledges is a portion of an electrode self-alignment to the quantum dot.
    Type: Application
    Filed: November 19, 2021
    Publication date: March 17, 2022
    Applicant: National Yang Ming Chiao Tung University
    Inventors: Pei-Wen Li, Kang-Ping Peng, Ching-Lun Chen, Tsung-Lin Huang
  • Patent number: 11244646
    Abstract: A display device and a display control method are provided. The display device is applicable to a display panel. The display device includes a display driver integrated circuit (IC), a gate driver in panel (GIP) circuit and a GIP check circuit. The GIP circuit includes a plurality of shift registers connected in series, and the shift registers may generate a plurality of gate driving signals to control operations of a plurality of rows of display units within the display panel, respectively. The GIP check circuit may sequentially check whether a plurality of specific gate driving signals among the gate driving signals are available. The display driver IC may generate a check result according to at least one signal from the display panel, and selectively adjust display data corresponding to an image to make the display panel display an adjusted image according to the check result.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: February 8, 2022
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Chih-Ying Lin, Ching-Lun Chen
  • Publication number: 20220020588
    Abstract: The invention provides a quantum dot manufacturing method and related quantum dot semiconductor structure. The quantum dot semiconductor structure includes: a conductive ridge on a substrate; an insulative layer covering the substrate and the conductive ridge, wherein the insulative layer includes a top portion and two sidewalls over the conductive ridge; a plurality of quantum dots respectively embedded within a plurality of silicon dioxide spacer islands, which are adhered to the sidewalls of the insulative layer; and a plurality of conductive ledges adhered to the silicon dioxide spacer islands, wherein each of the conductive ledges is a portion of an electrode with alignment to the corresponding quantum dot.
    Type: Application
    Filed: July 17, 2020
    Publication date: January 20, 2022
    Applicant: National Chiao Tung University
    Inventors: Pei-Wen Li, Kang-Ping Peng, Ching-Lun Chen, Tsung-Lin Huang
  • Patent number: 11227765
    Abstract: The invention provides a quantum dot manufacturing method and related quantum dot semiconductor structure. The quantum dot semiconductor structure includes: a conductive ridge on a substrate; an insulative layer covering the substrate and the conductive ridge, wherein the insulative layer includes a top portion and two sidewalls over the conductive ridge; a plurality of quantum dots respectively embedded within a plurality of silicon dioxide spacer islands, which are adhered to the sidewalls of the insulative layer; and a plurality of conductive ledges adhered to the silicon dioxide spacer islands, wherein each of the conductive ledges is a portion of an electrode with alignment to the corresponding quantum dot.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: January 18, 2022
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Pei-Wen Li, Kang-Ping Peng, Ching-Lun Chen, Tsung-Lin Huang
  • Patent number: 11197359
    Abstract: A backlight module is disclosed, which includes light emitting units arranged in columns. Each light emitting unit includes a light emitter and a first switch in parallel connection. The first switch is configured to selectively bypass the light emitter. In the backlight module, the light emitters in the same column of light emitting units are in serial connection.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: December 7, 2021
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Chih-Ying Lin, Yung-Lin Chang, Ching-Lun Chen
  • Patent number: 11170675
    Abstract: A method for performing hybrid over-current protection (OCP) detection in a display module and associated timing controller are provided. The method includes: during initialization of the display module, after a set of driving voltages have been established, performing first OCP detection in a built-in self-test (BIST) mode to generate a first OCP detection result; writing the first OCP detection result into a register bank, for being accessed by a host device, wherein the display module is applicable to displaying information for the host device; performing second OCP detection in a normal mode to generate a second OCP detection result; and writing the second OCP detection result into the register bank, for being accessed by the host device.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: November 9, 2021
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventor: Ching-Lun Chen
  • Publication number: 20210295752
    Abstract: A method for performing hybrid over-current protection (OCP) detection in a display module and associated timing controller are provided. The method includes: during initialization of the display module, after a set of driving voltages have been established, performing first OCP detection in a built-in self-test (BIST) mode to generate a first OCP detection result; writing the first OCP detection result into a register bank, for being accessed by a host device, wherein the display module is applicable to displaying information for the host device; performing second OCP detection in a normal mode to generate a second OCP detection result; and writing the second OCP detection result into the register bank, for being accessed by the host device.
    Type: Application
    Filed: March 19, 2020
    Publication date: September 23, 2021
    Inventor: Ching-Lun Chen
  • Patent number: 10997941
    Abstract: An ESL driver circuit to be coupled to a host circuit and an ESL panel includes an ESL driver and a controlling transistor. The ESL driver has a serial clock input coupled to the serial clock port of the ESL driver circuit, a serial data input coupled to the serial data port of the ESL driver circuit, a control input coupled to the control port of the ESL driver circuit, and a busy output. The controlling transistor has a control terminal coupled to the busy output of the ESL driver, a first terminal coupled to a supply voltage level via a resistor, and a second terminal coupled to a ground level, and is configured to receive the busy output of the ESL driver to generate a busy signal at the first terminal.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: May 4, 2021
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventor: Ching-Lun Chen
  • Patent number: 10997894
    Abstract: A method of ESL driver circuit includes: receiving third-color data and black/white data transmitted from a host circuit via specific communication protocol in a first transmission mode of specific communication protocol; receiving only the third-color data transmitted from the host circuit via the specific communication protocol in a second transmission mode of specific communication protocol; using third-color data buffer to receive and buffer the third-color data transmitted from the host circuit; using black/white data buffer to receive and buffer the black/white data transmitted from the host circuit in the first transmission mode of specific communication protocol; and detecting content of the third-color data buffered in the third-color data buffer to determine whether to output data stored in the black/white data buffer as a set of black/white data outputted to ESL panel or to refill a sequence of don't-care data as the set of black/white data outputted to ESL panel.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: May 4, 2021
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventor: Ching-Lun Chen
  • Patent number: 8758639
    Abstract: An electrolyte composition with a low gelling temperature is disclosed, which includes: an electrolyte gelator which is an acrylonitrile-based copolymer; and a liquid electrolyte containing a nitrile-based solvent. A method for manufacturing an electronic device using the aforesaid electrolyte composition is also disclosed.
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: June 24, 2014
    Assignee: National Cheng Kung University
    Inventors: Yuh-Lang Lee, Ching-Lun Chen
  • Patent number: 8455586
    Abstract: A copolymeric gelator includes a minor monomeric unit; and a major acrylonitrile (AN) monomeric unit copolymerized with the minor monomeric unit to provide a copolymer that is soluble in a solvent comprised of 1,2-dimethyl-3-propylimidazolium iodide and 3-methoxypropionitrile. The major acrylonitrile (AN) monomeric units have good ionic conductivity and coordinating sites for lithium ions to be dissolved with a liquid-electrolytic solvent. The minor monomeric units may be selected among vinyl acetate, allyl acetate, styrene, acrylamide and a combination thereof. The gelator and a liquid-electrolytic solvent may be used to produce a gel electrolyte.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: June 4, 2013
    Assignee: National Cheng Kung University
    Inventors: Yuh-Lang Lee, Ching-Lun Chen
  • Publication number: 20120160307
    Abstract: The present invention provides a dye-sensitized solar cell (DSSC), and a method for manufacturing the same. In the present invention, the DSSC comprises: a dye-sensitized semiconductor electrode, a counter electrode opposite to the dye-sensitized semiconductor electrode, and an electrolyte disposed between the dye-sensitized semiconductor electrode and the counter electrode. Herein, the dye-sensitized semiconductor electrode comprises: an anode; a TiO2 layer disposed on the anode; and a dye absorbed to the TiO2 layer. In addition, the counter electrode comprises: a first transparent substrate with a first transparent electrode formed thereon; and a Pt film disposed on the first transparent electrode, wherein the Pt film is formed with plural Pt nanoparticles, the diameters of the Pt nanoparticles are 1-8 nm, and the thickness of the Pt film is 0.5-3 nm.
    Type: Application
    Filed: June 24, 2011
    Publication date: June 28, 2012
    Applicant: National Cheng Kung University
    Inventors: Yuh-Lang LEE, Ching-Lun Chen, Chien-Heng Chen
  • Publication number: 20120018077
    Abstract: An electrolyte composition with a low gelling temperature is disclosed, which includes: an electrolyte gelator which is an acrylonitrile-based copolymer; and a liquid electrolyte containing a nitrile-based solvent. A method for manufacturing an electronic device using the aforesaid electrolyte composition is also disclosed.
    Type: Application
    Filed: March 30, 2011
    Publication date: January 26, 2012
    Applicant: National Cheng Kung University
    Inventors: Yuh-Lang Lee, Ching-Lun Chen
  • Publication number: 20100267849
    Abstract: A gelator for producing a gel electrolyte is a copolymer and comprises multiple major monomeric units, multiple minor monomeric units and multiple optional components. The major monomeric units comprise acrylonitrile (AN) monomeric units that have good ionic conductivity and coordinating sites for lithium ions to be dissolved with a liquid-electrolytic solvent. The minor monomeric units are a combination of at least one type monomeric unit, and the combination of at least one type monomeric unit is selected from a group consisting of vinyl acetate (VA), allyl acetate (AA), styrene, acrylamide and at least one reactive compound. A gel electrolyte is a mixture of a gelator and a liquid-electrolytic solvent.
    Type: Application
    Filed: March 12, 2010
    Publication date: October 21, 2010
    Applicant: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Yuh-Lang LEE, Ching-Lun Chen