Patents by Inventor Ching Meng Fang
Ching Meng Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240105630Abstract: A semiconductor device has a first RDL substrate with first conductive pillars formed over a first surface of the first RDL substrate. A first electrical component is disposed over the first surface of the first RDL substrate. A hybrid substrate is bonded to the first RDL substrate. An encapsulant is deposited around the hybrid substrate and first RDL substrate with the first conductive pillars and first electrical component embedded within the encapsulant. A second RDL substrate with second conductive pillars formed over the second RDL substrate and second electrical component disposed over the second RDL substrate can be bonded to the hybrid substrate. A second RDL can be formed over a second surface of the first RDL substrate. A third electrical component is disposed over a second surface of the first RDL substrate. A shielding frame is disposed over the third electrical component.Type: ApplicationFiled: September 28, 2022Publication date: March 28, 2024Applicant: STATS ChipPAC Pte. Ltd.Inventors: Yaojian Lin, Linda Pei Ee Chua, Ching Meng Fang, Hin Hwa Goh
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Publication number: 20220093479Abstract: A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die.Type: ApplicationFiled: December 7, 2021Publication date: March 24, 2022Applicant: JCET Semiconductor (Shaoxing) Co., Ltd.Inventors: See Chian Lim, Teck Tiong Tan, Yung Kuan Hsiao, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao
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Patent number: 11227809Abstract: A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die.Type: GrantFiled: March 13, 2017Date of Patent: January 18, 2022Inventors: See Chian Lim, Teck Tiong Tan, Yung Kuan Hsiao, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao
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Publication number: 20170186660Abstract: A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die.Type: ApplicationFiled: March 13, 2017Publication date: June 29, 2017Applicant: STATS ChipPAC Pte. Ltd.Inventors: See Chian Lim, Teck Tiong Tan, Yung Kuan Hsiao, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao
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Patent number: 9627338Abstract: A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die.Type: GrantFiled: February 21, 2014Date of Patent: April 18, 2017Assignee: STATS ChipPAC Pte. Ltd.Inventors: See Chian Lim, Teck Tiong Tan, Yung Kuan Hsiao, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao
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Publication number: 20140252641Abstract: A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die.Type: ApplicationFiled: February 21, 2014Publication date: September 11, 2014Applicant: STATS ChipPAC, Ltd.Inventors: See Chian Lim, Teck Tiong Tan, Yung Kuan Hsiao, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao
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Patent number: 7616448Abstract: An improved overmolded electronic assembly includes a backplate provided with a recessed edge, a circuit substrate on the backplate, at least one electronic component mounted on the circuit substrate, conductive traces on the circuit substrate which together with the electronic component(s) defines a circuit device, an electrical connector, and an overmold body that has peripheral edges that wrap around sides of the backplate and onto the edge recesses. The resulting over wrap feature eliminates delamination problems that would otherwise occur during thermal cycling of the electronic assembly, improves corrosion resistance at connector-to-backplate interfaces, and enhances securement of the printed circuit board assembly and electrical connector to the assembly.Type: GrantFiled: September 14, 2007Date of Patent: November 10, 2009Assignee: Delphi Technologies, Inc.Inventors: Thomas A. Degenkolb, Scott D. Brandenburg, Larry M. Mandel, Kin Yean Chow, Ching Meng Fang, Sim Ying Yong
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Publication number: 20090197478Abstract: An improved overmolded electronic assembly includes a backplate, a circuit substrate on the backplate, at least one electronic component mounted on the circuit substrate, conductive traces on the circuit substrate which together with the electronic component(s) defines a circuit device, an electrical connector having a thermoplastic body and electrical conducting elements embedded in and extending through the thermoplastic body to define internal and external connectors, and an overmold body that is mechanically interlocked with protuberances integrally formed on the thermoplastic body of the electrical connector.Type: ApplicationFiled: February 6, 2008Publication date: August 6, 2009Inventors: Larry M. Mandel, Kin Yean Chow, Ching Meng Fang, Sim Ying Yong
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Publication number: 20090073663Abstract: An improved overmolded electronic assembly includes a backplate provided with a recessed edge, a circuit substrate on the backplate, at least one electronic component mounted on the circuit substrate, conductive traces on the circuit substrate which together with the electronic component(s) defines a circuit device, an electrical connector, and an overmold body that has peripheral edges that wrap around sides of the backplate and onto the edge recesses. The resulting over wrap feature eliminates delamination problems that would otherwise occur during thermal cycling of the electronic assembly, improves corrosion resistance at connector-to-backplate interfaces, and enhances securement of the printed circuit board assembly and electrical connector to the assembly.Type: ApplicationFiled: September 14, 2007Publication date: March 19, 2009Inventors: Thomas A. Degenkolb, Scott D. Brandenburg, Larry M. Mandel, Kin Yean Chow, Ching Meng Fang, Sim Ying Yong
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Patent number: 7462077Abstract: A partially overmolded component having a precisely defined overmolding edge includes a component having a protruding elongate rib and the overmolding having a terminal edge abutting the protruding elongate rib. The rib defines surfaces that provide a greater area of contact between the component and an overmolding tool and a more tortuous flow path to bleed-through.Type: GrantFiled: November 27, 2006Date of Patent: December 9, 2008Assignee: Delphi Technologies, Inc.Inventors: Kin Yean Chow, Ching Meng Fang, Larry M. Mandel, Sim Ying Yong
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Patent number: 7455552Abstract: An improved overmolded electronic assembly includes a backplate, a circuit substrate on the backplate, at least one electronic component mounted on the circuit substrate, conductive traces on the circuit substrate which together with the electronic component(s) defines a circuit device, an electrical connector, a metal ring on an outer side of a thermoplastic wall member of the electrical connector, and an overmold body. The metal ring circumscribes external connector pins of the electrical connector, and the overmold body together with the backplate and thermoplastic wall member of the electrical connector sealingly encase the circuit substrate and the circuit device defined on the substrate, with the overmold body having a peripheral edge in adhesive contact with the metal ring. The invention avoids delamination problems associate with similar arrangements which do not incorporate a metal ring.Type: GrantFiled: February 6, 2008Date of Patent: November 25, 2008Assignee: Delphi Technologies, Inc.Inventors: Ching Meng Fang, Kin Yean Chow, Larry M. Mandel, Sim Ying Yong
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Publication number: 20080124987Abstract: A partially overmolded component having a precisely defined overmolding edge includes a component having a protruding elongate rib and the overmolding having a terminal edge abutting the protruding elongate rib. The rib defines surfaces that provide a greater area of contact between the component and an overmolding tool and a more tortuous flow path to bleed-through.Type: ApplicationFiled: November 27, 2006Publication date: May 29, 2008Inventors: Kin Yean Chow, Ching Meng Fang, Larry M. Mandel, Sim Ying Yong
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Patent number: 6319450Abstract: A mold has at least one vent hole formed in the mold. The vent hole is positioned to allow egress of air from the mold. The vent hole has an inside end and an outside end. The vent hole has a cross section that increases in area from the inside end to the outside end. The vent hole may have a shape of a trapezoidal prism, a truncated pyramid or a truncated cone; the cross section of the vent hole may be a rectangle. A preferred mold has three air vent holes at three corners of the mold. An integrated circuit is placed within the mold. A material to be molded is injected into the mold to encapsulate the integrated circuit. Mold cleaning is facilitated by the shape of the vent, and plastic flashes may be easily removed through the vent hole.Type: GrantFiled: July 12, 1999Date of Patent: November 20, 2001Assignee: Agere Systems Guardian Corp.Inventors: Kok Hua Chua, Ching Meng Fang, Kim Hwee Tan