Patents by Inventor Ching-Ming Hsu

Ching-Ming Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240099154
    Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: UNITED MICROELECTRONICS CORP
    Inventors: Hui-Lin Wang, Si-Han Tsai, Dong-Ming Wu, Chen-Yi Weng, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang
  • Patent number: 11930174
    Abstract: A method and apparatus for block partition are disclosed. If a cross-colour component prediction mode is allowed, the luma block and the chroma block are partitioned into one or more luma leaf blocks and chroma leaf blocks. If a cross-colour component prediction mode is allowed, whether to enable an LM (Linear Model) mode for a target chroma leaf block is determined based on a first split type applied to an ancestor chroma node of the target chroma leaf block and a second split type applied to a corresponding ancestor luma node. According to another method, after the luma block and the chroma block are partitioned using different partition tress, determine whether one or more exception conditions to allow an LM for a target chroma leaf block are satisfied when the chroma partition tree uses a different split type, a different partition direction, or both from the luma partition tree.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: March 12, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Tzu-Der Chuang, Chih-Wei Hsu, Ching-Yeh Chen, Zhi-Yi Lin
  • Patent number: 11924444
    Abstract: Method and apparatus for constrained de-blocking filter are disclosed. One method receives input data related to a current block in a current picture at a video encoder side or a video bitstream corresponding to compressed data including the current block in the current picture at a video decoder side, and determines a first boundary associated with the current block, wherein the first boundary corresponds to one vertical boundary or one horizontal boundary of the current block. The method then applies de-blocking process to a reconstructed current block corresponding to the current block to result in a filtered-reconstructed current block, using a plurality of first reference samples at a same side of the first boundary, and replaces a first set of the first reference samples by one or more padding values. The method then generates a filtered decoded picture including the filtered-reconstructed current block.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: March 5, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Chih-Wei Hsu, Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
  • Publication number: 20190096866
    Abstract: A semiconductor package including a first semiconductor chip, a plurality of first conductors, a first conductive pattern electrically connected to the first conductors, a second semiconductor chip disposed on the first semiconductor chip, and an encapsulant on the first conductive pattern and laterally encapsulating the second semiconductor chip. The first semiconductor chip electrically connected to the first conductors includes a sensing area on a first active surface, a first back surface and a plurality of through holes extending form the first back surface towards the first active surface. The second semiconductor chip including a second active surface facing towards the first back surface electrically connects the first semiconductor chip through the first conductors in the through holes and the first conductive pattern on the first back surface. A manufacturing method of a semiconductor package is also provided.
    Type: Application
    Filed: September 26, 2017
    Publication date: March 28, 2019
    Applicant: Powertech Technology Inc.
    Inventors: Ching-Ming Hsu, Wen-Hsiung Chang, Po-Wei Yeh, Yun-Hsin Yeh
  • Publication number: 20140192033
    Abstract: A three-dimensional (3D) image apparatus is provided. The 3D image apparatus includes a display unit, a front camera, and a processor. The front camera captures an image of the eyes of the user. The processor is coupled to the display unit and the front camera. The processor determines the position of the eyes of the user based on the image of the eyes of the user, and determines whether to display a 3D image or a two-dimensional (2D) image on the display based on the position of the eyes of the user.
    Type: Application
    Filed: January 7, 2013
    Publication date: July 10, 2014
    Applicant: HTC CORPORATION
    Inventors: Ching-Ming Hsu, Yi-Yuan Hsieh, Po-Chang Ho
  • Patent number: 7615285
    Abstract: A fabrication method of an indium tin oxide (ITO) anode containing point nickel for an organic light emitting diode (OLED) to selectively light includes various processes of preparing an ITO substrate with an anode having plural point grooves, of forming a nickel film on the anode, and of grinding the nickel film to leave the point grooves fitted with nickel. Therefore, the nickel spots of the ITO anode are lit up earlier than the pure ITO anode when the OLED is turn on. Because the nickel spots have a lower resistance, current can aggregate in these spots collectively, reducing demerit of cross-talk happening often in a conventional passive OLED panel circuit. The structure of the OLED includes an ITO substrate with an anode provided point grooves deposited with nickel, a hole transport layer on the anode, and an electron transport layer on the hole transport layer.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: November 10, 2009
    Assignee: Southern Taiwan University
    Inventors: Ching-Ming Hsu, Wen-Tuan Wu, Chung-Lin Tsai
  • Publication number: 20070298222
    Abstract: A fabrication method of an indium tin oxide (ITO) anode containing point nickel for an organic light emitting diode (OLED) to selectively light includes various processes of preparing an ITO substrate with an anode having plural point grooves, of forming a nickel film on the anode, and of grinding the nickel film to leave the point grooves fitted with nickel. Therefore, the nickel spots of the ITO anode are lit up earlier than the pure ITO anode when the OLED is turn on. Because the nickel spots have a lower resistance, current can aggregate in these spots collectively, reducing demerit of cross-talk happening often in a conventional passive OLED panel circuit. The structure of the OLED includes an ITO substrate with an anode provided point grooves deposited with nickel, a hole transport layer on the anode, and an electron transport layer on the hole transport layer.
    Type: Application
    Filed: June 21, 2006
    Publication date: December 27, 2007
    Applicant: Ching-Ming HSU
    Inventors: Ching-Ming Hsu, Wen-Tuan Wu, Chung-Lin Tsai
  • Publication number: 20070298283
    Abstract: A fabrication method of an indium tin oxide (ITO) anode containing nickel for improving injection efficiency of an organic light emitting diode (OLED) includes various processes of preparing an ITO substrate with an anode, of preparing a target source of ITO containing nickel, and of mingling nickel on the anode of the ITO substrate by sputtering. The structure of the ITO anode containing nickel for an OLED includes a substrate with an anode mingled with nickel, a hole transport layer and an electron transport layer. Such an ITO anode is to have a higher work function that can lessen a great potential barrier between the ITO anode and a hole transport layer. So the threshold voltage and the turn-on voltage of OLED can be reduced to advance hole injection efficiency.
    Type: Application
    Filed: June 21, 2006
    Publication date: December 27, 2007
    Applicant: Ching-Ming HSU
    Inventors: Ching-Ming Hsu, Wen-Tuan Wu, Hsin-Hui Lee