Abstract: A method of forming a semiconductor device includes forming a mask layer over a substrate and forming an opening in the mask layer. A gap-filling material is deposited in the opening. A plasma treatment is performed on the gap-filling material. The height of the gap-filling material is reduced. The mask layer is removed. The substrate is patterned using the gap-filling material as a mask.

Abstract: A blood pressure detection device manufactured by a semiconductor process includes a substrate, a microelectromechanical element, a gas-pressure-sensing element, a driving-chip element, an encapsulation layer and a valve layer. The substrate includes inlet apertures. The microelectromechanical element and the gas-pressure-sensing element are stacked and integrally formed on the substrate. The encapsulation layer is encapsulated and positioned on the substrate. A flowing-channel space is formed above the microelectromechanical element and the gas-pressure-sensing element. The encapsulation layer includes an outlet aperture in communication with an airbag. The driving-chip element controls the microelectromechanical element, the gas-pressure-sensing element and valve units to transport gas.

Abstract: The present disclosure provides a method for manufacturing semiconductor device and a semiconductor device formed using same. The method includes: preparing a substrate; forming a pad oxide layer and a barrier layer on the substrate, the barrier layer is disposed on the pad oxide layer; forming a plurality of shallow trench isolation structures in the substrate to form multiple regions in the substrate; removing a part of the barrier layer to form a recess, the recess is set in any one of the multiple regions, and a region directly below the recess is defined as a high voltage device region; and forming a gate oxide layer in the recess, and removing the barrier layer. The method provided in the present disclosure simplifies the manufacturing process and reduces the production costs.

Abstract: The present disclosure provides a semiconductor structure and a manufacturing method thereof. The method includes: preparing a semiconductor substrate; sequentially forming an oxide layer and a sacrificial layer on the semiconductor substrate, the thickness of the oxide layer is a first thickness; forming a plurality of trenches in the semiconductor substrate, wherein the trenches extending from the sacrificial layer into the semiconductor substrate; forming an isolation dielectric layer on the plurality of trenches and the sacrificial layer, and removing the isolation dielectric layer on the sacrificial layer to form a plurality of isolation structures; forming a well region in the semiconductor substrate; processing the oxide layer by an etching process, so that the thickness of the oxide layer is equal to a second thickness, the first thickness is greater than the second thickness; and forming a polysilicon gate on the etched oxide layer.

Abstract: The present invention provides a cell counting and culture interpretation method and its application, which includes: obtaining a cell culture image; segmenting the cell culture image by a cell inference model to obtain a plurality of regions corresponding to a plurality of classification parameters; calculating a culture parameter corresponding to one of the classification parameters; and determining to replace a culture medium when the culture parameter is between 0.05 and 0.15 and determining to harvest cells when the culture parameter is greater than 0.69. The present invention can provide objective and consistent standards to further improve efficiency and reduce manpower costs.

Abstract: The present disclosure provides a semiconductor structure and a manufacturing method thereof. The method includes: preparing a semiconductor substrate; sequentially forming an oxide layer and a sacrificial layer on the semiconductor substrate, the thickness of the oxide layer is a first thickness; forming a plurality of trenches in the semiconductor substrate, wherein the trenches extending from the sacrificial layer into the semiconductor substrate; forming an isolation dielectric layer on the plurality of trenches and the sacrificial layer, and removing the isolation dielectric layer on the sacrificial layer to form a plurality of isolation structures; forming a well region in the semiconductor substrate; processing the oxide layer by an etching process, so that the thickness of the oxide layer is equal to a second thickness, the first thickness is greater than the second thickness; and forming a polysilicon gate on the etched oxide layer.

Abstract: A diffused field-effect transistor (FET) is disclosed. The diffused FET is dually optimized in voltage resistance by incorporating both a trench isolation structure and a thick second oxide layer and thus has a more significantly improved breakdown voltage. With the thick second oxide layer ensuring suitable voltage resistance of the transistor device, its on-resistance can be reduced either by reducing the size of the trench isolation structure or increasing an ion dopant concentration of a drift region. As such, a good tradeoff between voltage resistance and on-resistance is achievable.

Abstract: A diffused field-effect transistor (FET) and a method of fabricating same are disclosed. The diffused FET is dually optimized in voltage resistance by incorporating both a trench isolation structure and a thick second oxide layer and thus has a more significantly improved breakdown voltage. With the thick second oxide layer ensuring suitable voltage resistance of the transistor device, its on-resistance can be reduced either by reducing the size of the trench isolation structure or increasing an ion dopant concentration of a drift region. As such, a good tradeoff between voltage resistance and on-resistance is achievable.

Abstract: A silicon island structure and a method of fabricating same are disclosed. The method includes: forming multiple first trenches in a silicon substrate; forming second trenches by partially filling some of the first trenches with an insulating material; depositing a protective layer over the silicon substrate and over the second trenches; removing the protective layer over bottoms of the second trenches and the insulating material under the second trenches, thereby exposing sidewalls of some first trenches; oxidizing portions of the silicon substrate between the exposed sidewalls of the first trenches to form an oxide layer; removing the protective layer covering sidewalls of the second trenches; and filling the second trenches with an isolating material to form isolations, wherein portions of the silicon substrate between the isolations define silicon islands. This method enables the formation of silicon islands at desired locations with reduced process complexity and cost.

Abstract: A method and a system for transmitting data are provided. In a source apparatus, original data is divided into a plurality of source segments, a similarity calculation is performed for each of the source segments to obtain a similarity set, and the similarity set is transmitted to a target apparatus. In the target apparatus, whether a target segment corresponding to the source segment exists in the target apparatus is determined according to the similarity set to obtain a comparison result, and the comparison result is transmitted to the source apparatus. In the source apparatus, after the original data is dehydrated according to the comparison result to obtain dehydration data, the dehydration data is transmitted to the target apparatus. In the target apparatus, the dehydration data is rehydrated to the original data.

Abstract: A connection method and a management server are provided. Each electronic apparatus detects connection behavior supported by a network, where the electronic apparatus is located, through the management server and accordingly generates a corresponding connection profile and stores it to the management server. The management server reads two connection profiles corresponding to two electronic apparatuses when the management server receives a connection request desired to connect from one of the electronic apparatuses to another one, and dynamically adjusts a plurality of connection detection procedures based on a connection success/failure record. The management server tests the connection detection procedures to determine whether a connection can be established between the two electronic apparatuses so as to obtain a session profile for establishing the connection.

Abstract: A method and a system for transmitting data are provided. In a source apparatus, original data is divided into a plurality of source segments, a similarity calculation is performed for each of the source segments to obtain a similarity set, and the similarity set is transmitted to a target apparatus. In the target apparatus, whether a target segment corresponding to the source segment exists in the target apparatus is determined according to the similarity set to obtain a comparison result, and the comparison result is transmitted to the source apparatus. In the source apparatus, after the original data is dehydrated according to the comparison result to obtain dehydration data, the dehydration data is transmitted to the target apparatus. In the target apparatus, the dehydration data is rehydrated to the original data.

Abstract: A ring-shaped magnetoresistive memory device includes a ring-shaped magnetoresistive memory cell, a first conductor, and a second conductor. The first conductor is positioned on a first surface of the ring-shaped magnetoresistive memory cell for generating a first magnetic field pulse. The second conductor is positioned on a second surface of the ring-shaped magnetoresistive memory cell for generating a second magnetic field pulse. The first surface is opposite to the second surface. An extension direction of the first conductor is perpendicular to an extension direction of the second conductor. A time delay is between the first magnetic field pulse and the second magnetic field pulse.

Abstract: A ring-shaped magnetoresistive memory device includes a ring-shaped magnetoresistive memory cell, a first conductor, and a second conductor. The first conductor is positioned on a first surface of the ring-shaped magnetoresistive memory cell for generating a first magnetic field pulse. The second conductor is positioned on a second surface of the ring-shaped magnetoresistive memory cell for generating a second magnetic field pulse. The first surface is opposite to the second surface. An extension direction of the first conductor is perpendicular to an extension direction of the second conductor. A time delay is between the first magnetic field pulse and the second magnetic field pulse.

Abstract: A high voltage semiconductor device includes a substrate, an insulating layer positioned on the substrate, and a silicon layer positioned on the insulating layer. The silicon layer further includes at least a first doped strip, two terminal doped regions formed respectively at two opposite ends of the silicon layer and electrically connected to the first doped strip, and a plurality of second doped strips. The first doped strip and the terminal doped regions include a first conductivity type, the second doped strips include a second conductivity type, and the first conductivity type and the second conductivity type are complementary. The first doped strip and the second doped strips are alternately arranged.

Abstract: A connection method and a management server are provided. Each electronic apparatus detects connection behavior supported by a network, where the electronic apparatus is located, through the management server and accordingly generates a corresponding connection profile and stores it to the management server. The management server reads two connection profiles corresponding to two electronic apparatuses when the management server receives a connection request desired to connect from one of the electronic apparatuses to another one, and dynamically adjusts a plurality of connection detection procedures based on a connection success/failure record. The management server tests the connection detection procedures to determine whether a connection can be established between the two electronic apparatuses so as to obtain a session profile for establishing the connection.

Abstract: A high-voltage semiconductor device is disclosed. The HV semiconductor device includes: a substrate; a well of first conductive type disposed in the substrate; a first doping region of second conductive type disposed in the p-well; a first isolation structure disposed in the well of first conductive type and surrounding the first doping region of second conductive type; and a first drift ring of second conductive type disposed between the first doping region of second conductive type and the first isolation structure.

Abstract: A method for fabricating a lateral-diffusion metal-oxide semiconductor (LDMOS) device is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a first region and a second region both having a first conductive type in the semiconductor substrate, wherein the first region not contacting the second region; and performing a thermal process to diffuse the dopants within the first region and the second region into the semiconductor substrate to form a deep well, wherein the doping concentration of the deep well is less than the doping concentration of the first region and the second region.

Abstract: A high voltage semiconductor device includes a substrate, an insulating layer positioned on the substrate, and a silicon layer positioned on the insulating layer. The silicon layer further includes at least a first doped strip, two terminal doped regions formed respectively at two opposite ends of the silicon layer and electrically connected to the first doped strip, and a plurality of second doped strips. The first doped strip and the terminal doped regions include a first conductivity type, the second doped strips include a second conductivity type, and the first conductivity type and the second conductivity type are complementary. The first doped strip and the second doped strips are alternately arranged.

Abstract: A magnetic stack structure is disclosed. The magnetic stack structure includes two metal layers and a free layer sandwiched by the two metal layers. The thickness of the free layer is 1-30 nm. The thickness of the metal layers are 0.1-20 nm respectively.