Patents by Inventor Ching-Ming Tsai

Ching-Ming Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9687956
    Abstract: The invention provides a polishing pad and a method of using the polishing pad for chemically-mechanically polishing a substrate. The polishing pad comprises a plurality of grooves composed of at least a first plurality of concentric grooves having a first center of concentricity, and a second plurality of concentric grooves having a second center of concentricity. The first center of concentricity is not coincident with the second center of concentricity, the axis of rotation of the polishing pad is not coincident with at least one of the first center of concentricity and the second center of concentricity, the plurality of grooves does not consist of a continuous spiral groove, and the polishing surface does not comprise a mosaic groove pattern.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: June 27, 2017
    Assignee: Cabot Microelectronics Corporation
    Inventors: Ching-Ming Tsai, Shi-Wei Cheng, Kun-Shu Yang, Jia-Cheng Hsu, Sheng-Huan Liu, Feng-Chih Hsu, Craig Kokjohn
  • Patent number: 9409276
    Abstract: The invention provides a polishing pad and a method of using the polishing pad for chemically-mechanically polishing a substrate. The polishing pad comprises at least a grooved region and an exclusion region, wherein the exclusion region is adjacent to the circumference of the polishing pad, and wherein the exclusion region is devoid of grooves.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: August 9, 2016
    Assignee: Cabot Microelectronics Corporation
    Inventors: Ching-Ming Tsai, Shi-Wei Cheng, Jia-Cheng Hsu, Kun-Shu Yang, Hui-Feng Chen, Gregory Gaudet, Sheng-Huan Liu
  • Publication number: 20150298287
    Abstract: The invention provides a polishing pad and a method of using the polishing pad for chemically-mechanically polishing a substrate. The polishing pad comprises a plurality of grooves composed of at least a first plurality of concentric grooves having a first center of concentricity, and a second plurality of concentric grooves having a second center of concentricity. The first center of concentricity is not coincident with the second center of concentricity, the axis of rotation of the polishing pad is not coincident with at least one of the first center of concentricity and the second center of concentricity, the plurality of grooves does not consist of a continuous spiral groove, and the polishing surface does not comprise a mosaic groove pattern.
    Type: Application
    Filed: November 5, 2013
    Publication date: October 22, 2015
    Inventors: Ching-Ming Tsai, Shi-Wei Cheng, Kun-Shu Yang, Jia-Cheng Hsu, Sheng-Huan Liu, Feng-Chih Hsu, Craig Kokjohn
  • Publication number: 20150111476
    Abstract: The invention provides a polishing pad and a method of using the polishing pad for chemically-mechanically polishing a substrate. The polishing pad comprises at least a grooved region and an exclusion region, wherein the exclusion region is adjacent to the circumference of the polishing pad, and wherein the exclusion region is devoid of grooves.
    Type: Application
    Filed: October 16, 2014
    Publication date: April 23, 2015
    Inventors: Ching-Ming TSAI, Shi-Wei CHENG, Jia-Cheng HSU, Kun-Shu YANG, Hui-Feng CHEN, Gregory GAUDET, Sheng-Huan LlU
  • Publication number: 20110014858
    Abstract: The present invention provides polishing pads for use in CMP processes. In one embodiment, a pad comprises a surface defining a plurality of grooves with landing surfaces separating the grooves, the landing surfaces together defining a substantially coplanar polishing surface, each groove having a depth of at least about 10 mil and a width, WG, with any two adjacent grooves being separated from each other a landing surface having a width, WL, wherein the quotient WL/WG is less than or equal to 3. In a preferred embodiment, the surface of the pad defines a series of concentric substantially circular grooves. In an alternative embodiment, the surface of the pad defines a spiral groove having a depth of at least about 10 mil and a width WG, and a spiral landing surface outlining spiral groove the having a width, WL, wherein the spiral landing surface defines a substantially coplanar polishing surface and the quotient WL/WG is less than or equal to 3.
    Type: Application
    Filed: July 16, 2010
    Publication date: January 20, 2011
    Inventors: Ching-Ming TSAI, Fred Sun, Sheng-Huan Liu, Jia-Cheng Hsu, Ananth Naman, Hao-Kuang Chiu, Dinesh Khanna
  • Publication number: 20050112895
    Abstract: A method of polishing a metal layer comprising the following steps. A structure having an upper patterned dielectric layer with an opening therein is provided. A barrier layer is formed over the patterned upper dielectric layer and lining the opening. A metal layer is formed over the barrier layer, filling the opening. A first polish step employing a first slurry composition is conducted to remove a portion of the overlying metal layer. A second polish step employing the first slurry composition is conducted to: polish the partially removed overlying metal layer; and to expose portions of the barrier layer overlying the patterned upper dielectric layer. A third polish step employing a second slurry composition is conducted to remove the exposed barrier layer portions and exposing underlying portions of the patterned upper dielectric layer. A fourth polish step employing the second slurry composition and BTA is conducted to buff the exposed upper dielectric layer portions.
    Type: Application
    Filed: October 28, 2004
    Publication date: May 26, 2005
    Inventors: Yi-Chen Chen, Ching-Ming Tsai, Ray-Ting Chang
  • Publication number: 20050059233
    Abstract: A process for forming a metal damascene structure. First, a cap layer is formed on a first metal layer, and a dielectric layer is formed on the cap layer. Next, the dielectric layer is etched to form a damascene opening. Next, hydrogen-containing plasma, nitrogen-containing plasma, oxygen-containing plasma, or a mixture thereof is used to perform the plasma treatment. Next, a metal is filled in the damascene opening to form a second metal layer. Peeling of the dielectric layer due to remaining impurities is eliminated by the plasma treatment after etching of the damascene opening.
    Type: Application
    Filed: September 12, 2003
    Publication date: March 17, 2005
    Inventors: Ming-Tsong Wang, Di-Shi Su, Chia-Ming Yang, Ching-Ming Tsai
  • Patent number: 6830504
    Abstract: A method of polishing a metal layer comprising the following steps. A structure having an upper patterned dielectric layer with an opening therein is provided. A barrier layer is formed over the patterned upper dielectric layer and lining the opening. A metal layer is formed over the barrier layer, filling the opening. A first polish step employing a first slurry composition is conducted to remove a portion of the overlying metal layer. A second polish step employing the first slurry composition is conducted to: polish the partially removed overlying metal layer; and to expose portions of the barrier layer overlying the patterned upper dielectric layer. A third polish step employing a second slurry composition is conducted to remove the exposed barrier layer portions and exposing underlying portions of the patterned upper dielectric layer. A fourth polish step employing the second slurry composition and BTA is conducted to buff the exposed upper dielectric layer portions.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: December 14, 2004
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yi-Chen Chen, Ching-Ming Tsai, Ray-Ting Chang
  • Patent number: 6756309
    Abstract: A method for achieving a predetermined electrical resistance of a semiconductor device metal line in a CMP process including providing a semiconductor process wafer comprising at least one dielectric layer for etching an opening through a thickness of the at least one dielectric layer; measuring a thickness of the at least one dielectric layer prior to etching the opening; etching the opening through a thickness of the at least one dielectric layer; measuring at least one dimension of the opening from which at least an opening depth is determined; forming a metal layer to fill the opening; and, performing a chemical mechanical polish (CMP) process to remove at least the metal layer overlying the opening level to form a metal filled opening according to a projected metal filled opening electrical resistance.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: June 29, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Chii-Ping Chen, Wen-Chen Chien, Ching-Ming Tsai
  • Patent number: RE45468
    Abstract: A method of polishing a metal layer comprising the following steps. A structure having an upper patterned dielectric layer with an opening therein is provided. A barrier layer is formed over the patterned upper dielectric layer and lining the opening. A metal layer is formed over the barrier layer, filling the opening. A first polish step employing a first slurry composition is conducted to remove a portion of the overlying metal layer. A second polish step employing the first slurry composition is conducted to: polish the partially removed overlying metal layer; and to expose portions of the barrier layer overlying the patterned upper dielectric layer. A third polish step employing a second slurry composition is conducted to remove the exposed barrier layer portions and exposing underlying portions of the patterned upper dielectric layer. A fourth polish step employing the second slurry composition and BTA is conducted to buff the exposed upper dielectric layer portions.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: April 14, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Chen Chen, Ching-Ming Tsai, Ray-Ting Chang