Patents by Inventor Ching-San Wu

Ching-San Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7526701
    Abstract: A method of measuring group delay of a device under test is provided. The method includes the steps of providing an analog input signal with a predetermined period to the device under test to obtain a delayed output signal from the device under test, converting the analog input signal and the delayed output signal into first and second digital signals, generating a phase difference signal indicative of a phase difference between the first and the second digital signals, and determining the group delay of the device under test based on the predetermined period and average signal level of the phase difference voltage and average signal level of the first digital signal.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: April 28, 2009
    Assignee: MediaTek Inc.
    Inventors: Ching-san Wu, Chien-ming Chen
  • Publication number: 20070177474
    Abstract: The invention provides a detecting method for effectively detecting blank regions on an optical storage medium. The detecting method is to detect the radio frequency (RF) waveform from the optical storage medium. The RF waveform includes a plurality of sinewaves with different frequencies. The amplitudes of the sinewaves are selectively boosted with different boost gains depending on the frequencies of the sinewaves to obtain a corresponding gain boost signal. The gain boost signal is judged with a predetermined blank judging interval or a predetermined threshold. When the present amplitudes of the gain boost signal fall within the blank judgment interval or are not beyond the predetermined threshold, the RF waveform is deemed detected from the blank regions of the optical storage medium.
    Type: Application
    Filed: March 29, 2007
    Publication date: August 2, 2007
    Inventors: Chien-Ming Chen, Ching-San Wu
  • Patent number: 7157949
    Abstract: A DLL capable of preventing false lock includes a false-lock detector, a delay line coupled for using at least one delay lag of the delay line to delay an incoming clock signal and produce at least one delay clock, and a charge pump coupled to the false-lock detector for adjusting a control voltage according to an upward or downward adjustment signal. The false-lock detector includes a first phase detector coupled to a first clock signal and a second clock signal for comparing phases of the first clock signal and the second clock signal to produce a phase difference signal; an average circuit coupled to the first phase detector for generating an average signal corresponding to an average of the phase difference signal; and a comparator circuit coupled to the average circuit for comparing the average signal with at least one reference signal to produce the upward or downward adjustment signal.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: January 2, 2007
    Assignee: Mediatek Incorporation
    Inventors: Chien-Ming Chen, Ching-San Wu
  • Publication number: 20060156147
    Abstract: A method of measuring group delay of a device under test is provided. The method includes the steps of providing an analog input signal with a predetermined period to the device under test to obtain a delayed output signal from the device under test, converting the analog input signal and the delayed output signal into first and second digital signals, generating a phase difference signal indicative of a phase difference between the first and the second digital signals, and determining the group delay of the device under test based on the predetermined period and average signal level of the phase difference voltage and average signal level of the first digital signal.
    Type: Application
    Filed: February 10, 2006
    Publication date: July 13, 2006
    Inventors: Ching-san Wu, Chien-ming Chen
  • Publication number: 20050206418
    Abstract: A DLL capable of preventing false lock includes a false-lock detector, a delay line coupled for using at least one delay lag of the delay line to delay an incoming clock signal and produce at least one delay clock, and a charge pump coupled to the false-lock detector for adjusting a control voltage according to an upward or downward adjustment signal. The false-lock detector includes a first phase detector coupled to a first clock signal and a second clock signal for comparing phases of the first clock signal and the second clock signal to produce a phase difference signal; an average circuit coupled to the first phase detector for generating an average signal corresponding to an average of the phase difference signal; and a comparator circuit coupled to the average circuit for comparing the average signal with at least one reference signal to produce the upward or downward adjustment signal.
    Type: Application
    Filed: March 17, 2005
    Publication date: September 22, 2005
    Inventors: Chien-Ming CHEN, Ching-San WU
  • Publication number: 20040057365
    Abstract: The present invention provides a detecting method for effectively detecting blank regions on an optical storage medium. The detecting method is to detect the radio frequency (RF) waveform from the optical storage medium. The RF waveform comprises a plurality of sinewaves with different frequencies. The amplitudes of the sinewaves are selectively boosted with different boost gains depending on the frequencies of the sinewaves to obtain a corresponding gain boost signal. The gain boost signal is judged with a predetermined blank judging interval. When the present amplitudes of the gain boost signal fall within the blank judgment interval, the RF waveform is deemed detected from the blank regions of the optical storage medium.
    Type: Application
    Filed: June 4, 2003
    Publication date: March 25, 2004
    Applicant: MediaTek Inc.
    Inventors: Chien-Ming Chen, Ching-San Wu
  • Patent number: 6710666
    Abstract: A charge pump for reducing capacitance in a loop filter of a phase locked loop. The loop filter contains a resistor and a capacitor. The charge pump includes first and second input current sources for supplying first and second currents to the charge pump, a first output current source for receiving the first current from the charge pump, and a second output current source for receiving the second current from the charge pump. The charge pump also contains a plurality of up pulse switches and down pulse switches for controlling current flow through the charge pump such that only a fraction of the current that flows through the resistor of the loop filter flows into and out of the capacitor for charging and discharging the capacitor. The size of the capacitor can be reduced accordingly based on the amount of current used to charge and discharge the capacitor.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: March 23, 2004
    Assignee: MediaTek Inc.
    Inventors: Ching-San Wu, Chien-Ming Chen