Patents by Inventor Ching-Sang Chuang
Ching-Sang Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8415672Abstract: This invention provides a transistor with an etching stop layer and a manufacturing method thereof. The transistor structure includes a substrate, a crystalline semiconductor layer, an etching stop structure, an ohmic contact layer, a source, a drain, a gate insulating layer, and a gate. The manufacturing method is performed by patterning the ohmic contact layer and the crystalline semiconductor layer at the same time with the same mask; and patterning the ohmic contact layer and the source/drain layer at the same time with another the same mask.Type: GrantFiled: January 14, 2011Date of Patent: April 9, 2013Assignee: AU Optronics CorporationInventors: Chin-Wei Hu, Ching-Sang Chuang, Chia-Yu Chen
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Publication number: 20120112214Abstract: An active device array substrate is provided. First, a substrate having a display area and a sensing area is provided. Then, a first patterned conductor layer is disposed on the display area of the substrate. A gate insulator is disposed on the substrate. A patterned semiconductor layer, a second patterned conductor layer and a patterned photosensitive dielectric layer are disposed on the gate insulator, wherein the second patterned conductor layer includes a source electrode, a drain electrode and a lower electrode, the patterned photosensitive dielectric layer covering the second patterned conductor layer includes an interface protection layer disposed on the source electrode and the drain electrode and a photo-sensing layer disposed on the lower electrode. A passivation layer is then disposed on the substrate. After that, a third patterned conductor layer including a pixel electrode and an upper electrode is disposed on the passivation layer.Type: ApplicationFiled: January 19, 2012Publication date: May 10, 2012Applicant: AU OPTRONICS CORPORATIONInventors: Yu-Cheng Chen, Chen-Yueh Li, Ching-Sang Chuang, Ching-Chieh Shih, An-Thung Cho
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Patent number: 8148185Abstract: A method for fabricating an active device array substrate is provided. First, a substrate having a display area and a sensing area is provided. Then, a first patterned conductor layer is formed on the display area of the substrate. A gate insulator is formed on the substrate. A patterned semiconductor layer, a second patterned conductor layer and a patterned photosensitive dielectric layer are formed on the gate insulator, wherein the second patterned conductor layer includes a source electrode, a drain electrode and a lower electrode, the patterned photosensitive dielectric layer covering the second patterned conductor layer includes an interface protection layer disposed on the source electrode and the drain electrode and a photo-sensing layer disposed on the lower electrode. A passivation layer is then formed on the substrate. After that, a third patterned conductor layer including a pixel electrode and an upper electrode is formed on the passivation layer.Type: GrantFiled: September 15, 2009Date of Patent: April 3, 2012Assignee: Au Optronics CorporationInventors: Yu-Cheng Chen, Chen-Yueh Li, Ching-Sang Chuang, Ching-Chieh Shih, An-Thung Cho
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Publication number: 20120049195Abstract: This invention provides a transistor with an etching stop layer and a manufacturing method thereof. The transistor structure includes a substrate, a crystalline semiconductor layer, an etching stop structure, an ohmic contact layer, a source, a drain, a gate insulating layer, and a gate. The manufacturing method is performed by patterning the ohmic contact layer and the crystalline semiconductor layer at the same time with the same mask; and patterning the ohmic contact layer and the source/drain layer at the same time with another the same mask.Type: ApplicationFiled: January 14, 2011Publication date: March 1, 2012Applicant: AU OPTRONICS CORPORATIONInventors: Chin-Wei Hu, Ching-Sang Chuang, Chia-Yu Chen
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Publication number: 20100267177Abstract: A method for fabricating an active device array substrate is provided. First, a substrate having a display area and a sensing area is provided. Then, a first patterned conductor layer is formed on the display area of the substrate. A gate insulator is formed on the substrate. A patterned semiconductor layer, a second patterned conductor layer and a patterned photosensitive dielectric layer are formed on the gate insulator, wherein the second patterned conductor layer includes a source electrode, a drain electrode and a lower electrode, the patterned photosensitive dielectric layer covering the second patterned conductor layer includes an interface protection layer disposed on the source electrode and the drain electrode and a photo-sensing layer disposed on the lower electrode. A passivation layer is then formed on the substrate. After that, a third patterned conductor layer including a pixel electrode and an upper electrode is formed on the passivation layer.Type: ApplicationFiled: September 15, 2009Publication date: October 21, 2010Applicant: AU OPTRONICS CORPORATIONInventors: Yu-Cheng Chen, Chen-Yueh Li, Ching-Sang Chuang, Ching-Chieh Shih, An-Thung Cho
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Publication number: 20100207033Abstract: A structure of X-ray detector includes a Si-rich dielectric material for serving as a photo-sensing layer to increase light sensitivity. The fabrication method of the X-ray detector including the Si-rich dielectric material needs less photolithography-etching processes, so as to reduce the total thickness of thin film layers and decrease process steps and cost.Type: ApplicationFiled: September 3, 2009Publication date: August 19, 2010Inventors: Yu-Cheng Chen, An-Thung Cho, Ching-Sang Chuang, Chia-Tien Peng
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Patent number: 7745243Abstract: A forming method of the present invention includes forming a first patterned conductive layer, which includes a transparent conductive layer and a metal layer stacked together on a substrate, where the first patterned conductive layer functions as gate lines, gate electrodes, common lines and predetermined transparent pixel electrode structures; and forming a second patterned conductive layer on the substrate. The second patterned conductive layer includes data lines and reflective pixel electrodes, and be directly connected to doping regions, such as source regions/drain regions. According to the forming method of the present invention, pixel structures of a transflective liquid crystal display device can be formed through five mask processes. Therefore, the manufacturing process of the transflective liquid crystal display device is effectively simplified, so the product yield is improved and the cost can be reduced.Type: GrantFiled: April 2, 2009Date of Patent: June 29, 2010Assignee: AU Optronics Corp.Inventors: Yu-Cheng Chen, Chen-Yueh Li, Ching-Sang Chuang, Kun-Chih Lin
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Publication number: 20100112737Abstract: A forming method of the present invention includes forming a first patterned conductive layer, which includes a transparent conductive layer and a metal layer stacked together on a substrate, where the first patterned conductive layer functions as gate lines, gate electrodes, common lines and predetermined transparent pixel electrode structures; and forming a second patterned conductive layer on the substrate. The second patterned conductive layer includes data lines and reflective pixel electrodes, and be directly connected to doping regions, such as source regions/drain regions. According to the forming method of the present invention, pixel structures of a transflective liquid crystal display device can be formed through five mask processes. Therefore, the manufacturing process of the transflective liquid crystal display device is effectively simplified, so the product yield is improved and the cost can be reduced.Type: ApplicationFiled: April 2, 2009Publication date: May 6, 2010Inventors: Yu-Cheng Chen, Chen-Yueh Li, Ching-Sang Chuang, Kun-Chih Lin
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Patent number: 7087363Abstract: A method of forming a top gate thin film transistor (TFT). By performing photolithography using a first reticle, a photoresist layer having a thick photoresist layer portion and a thin photoresist layer portion is formed on a silicon layer in an active area. Thus, a channel layer and source/drain regions in a silicon island are defined by the same patterning process. In addition, a gate and an LDD region in the silicon island are defined by photolithography using a second reticle and a backside exposure process. Accordingly, the top gate TFT fabrication process of the present invention requires only two reticles, and thereby reduces costs.Type: GrantFiled: August 29, 2003Date of Patent: August 8, 2006Assignee: Industrial Technology Research InstituteInventors: Chih-Chiang Chen, Ching-Sang Chuang, Jiun-Jye Chang
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Publication number: 20050250050Abstract: A method of forming a top gate thin film transistor (TFT). By performing photolithography using a first reticle, a photoresist layer having a thick photoresist layer portion and a thin photoresist layer portion is formed on a silicon layer in an active area. Thus, a channel layer and source/drain regions in a silicon island are defined by the same patterning process. In addition, a gate and an LDD region in the silicon island are defined by photolithography using a second reticle and a backside exposure process. Accordingly, the top gate TFT fabrication process of the present invention requires only two reticles, and thereby reduces costs.Type: ApplicationFiled: August 29, 2003Publication date: November 10, 2005Inventors: Chih-Chiang Chen, Ching-Sang Chuang, Jiun-Jye Chang
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Patent number: 6870585Abstract: A transflective LCD device having various cell gaps. The transflective LCD device is characterized by the passivation layer being formed on a lower substrate in a reflective region. A color filter layer is formed above the passivation layer, wherein a first thickness of the color filter layer in the reflective region is smaller than a second thickness of the color filter layer in a transmissive region. A transparent organic element is formed on an inner side of an upper substrate in the reflective region for bridging a gap in a liquid crystal layer between upper and lower substrates, wherein one end of the transparent organic element shores up the lower substrate. Thus, the gap thickness in the reflective region is smaller than that in the transmissive region.Type: GrantFiled: July 18, 2003Date of Patent: March 22, 2005Assignee: Industrial Technology Research InstituteInventors: Chih-Chiang Chen, Jiun-Jye Chang, Ching-Sang Chuang
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Publication number: 20040126914Abstract: A method of forming a TFT and a method of forming the TFT on a color filter. With a first reticle, a metal layer and a hole exposing a substrate are defined. A color filter is formed in the hole. With a second reticle, a silicon island is defined above the color filter. With a third reticle, a photoresist layer is formed, and a gate and a gate oxide layer are defined. The photoresist layer is wider than the gate and the gate oxide layer, but narrower than the semiconductor island. Using the photoresist layer as a mask, a source/drain region is formed in the silicon island by implantation. The photoresist layer is then removed. Using the gate as a mask, a LDD region is formed in the silicon island by implantation. With a fourth reticle, a transparent electrode is defined. Thus, a TFT is formed on the color filter.Type: ApplicationFiled: June 25, 2003Publication date: July 1, 2004Applicant: Industrial Technology Research InstituteInventors: Jiun-Jye Chang, Chih-Chiang Chen, Ching-Sang Chuang
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Publication number: 20040114077Abstract: A transflective LCD device having various cell gaps. The transflective LCD device is characterized by the passivation layer being formed on a lower substrate in a reflective region. A color filter layer is formed above the passivation layer, wherein a first thickness of the color filter layer in the reflective region is smaller than a second thickness of the color filter layer in a transmissive region. A transparent organic element is formed on an inner side of an upper substrate in the reflective region for bridging a gap in a liquid crystal layer between upper and lower substrates, wherein one end of the transparent organic element shores up the lower substrate. Thus, the gap thickness in the reflective region is smaller than that in the transmissive region.Type: ApplicationFiled: July 18, 2003Publication date: June 17, 2004Applicant: Industrial Technology Research InstituteInventors: Chih-Chiang Chen, Jiun-Jye Chang, Ching-Sang Chuang
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Patent number: 6692983Abstract: A method of forming a color filter on a substrate having pixel driving elements. A substrate having a plurality of light-transmitting areas and active areas is provided. A pixel driving element is formed on the substrate in each active area, wherein an insulation layer is formed between each pixel driving element. A planarization layer is formed on the pixel driving elements and the insulation layer. Part of the planarization layer is removed to form contact holes and openings, wherein the contact holes expose part of the pixel driving elements, and the openings expose the insulation layer in the light-transmitting areas. Color pigment is filled into the openings to form a color filter on the substrate having the pixel driving elements. Transparent pixel electrodes are formed in the contact holes to electrically connect the pixel driving elements, wherein the transparent electrodes extend onto part of the color filter.Type: GrantFiled: March 26, 2003Date of Patent: February 17, 2004Inventors: Chih-Chiang Chen, Ching-Sang Chuang, Jiun-Jye Chang
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Publication number: 20040023425Abstract: A method of forming a color filter on a substrate having pixel driving elements. A substrate having a plurality of light-transmitting area sand active areas is provided. A pixel driving element is formed on the substrate in each active area, wherein an insulation layer is formed between each pixel driving element. A planarization layer is formed on the pixel driving elements and the insulation layer. Part of the planarization layer is removed to form contact holes and openings, wherein the contact holes expose part of the pixel driving elements, and the openings expose the insulation layer in the light-transmitting areas. Color pigment is filled into the openings to form a color filter on the substrate having the pixel driving elements. Transparent pixel electrodes are formed in the contact holes to electrically connect the pixel driving elements, wherein the transparent electrodes extend onto part of the color filter.Type: ApplicationFiled: March 26, 2003Publication date: February 5, 2004Applicant: Industrial Technology Research InstituteInventors: Chih-Chiang Chen, Ching-Sang Chuang, Jiun-Jye Chang
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Patent number: 6511870Abstract: A method of fabricating a polysilicon thin film transistor with a self-aligned lightly doped drain (LDD) is described. At first a polysilicon-island region and a gate insulating layer are subsequently formed on a glass substrate performed by a pre-treatment. Then a metal layer and a cap layer are subsequently formed on the gate insulating layer. The cap layer and the metal layer are defined to form a gate. A heavily doped region is formed in the polysilicon island region with serving the gate as a mask. An activation step is performed on the heavily doped region and a sidewall of the metal layer. The cap layer above the metal layer and the sidewall of the metal layer performed by the activation step are removed. A lightly doped region is formed in the polysilicon-island region with serving the remaining metal layer.Type: GrantFiled: May 8, 2001Date of Patent: January 28, 2003Assignee: Industrial Technology Research InstituteInventors: Chih-Chiang Chen, Jiun-Jye Chang, Ching-Sang Chuang
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Publication number: 20020168808Abstract: A method of fabricating a polysilicon thin film transistor with a self-aligned lightly doped drain (LDD) is described. At first a polysilicon-island region and a gate insulating layer are subsequently formed on a glass substrate performed by a pre-treatment. Then a metal layer and a cap layer are subsequently formed on the gate insulating layer. The cap layer and the metal layer are defined to form a gate. A heavily doped region is formed in the polysilicon island region with serving the gate as a mask. An activation step is performed on the heavily doped region and a sidewall of the metal layer. The cap layer above the metal layer and the sidewall of the metal layer performed by the activation step are removed. A lightly doped region is formed in the polysilicon-island region with serving the remaining metal layer.Type: ApplicationFiled: May 8, 2001Publication date: November 14, 2002Applicant: Industrial Technology Research InstituteInventors: Chih-Chiang Chen, Jiun-Jye Chang, Ching-Sang Chuang