Patents by Inventor Ching-Shan Lin
Ching-Shan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250110307Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: ApplicationFiled: December 12, 2024Publication date: April 3, 2025Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
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Patent number: 12211698Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate, where the patterned resist layer has a first line width roughness. In various embodiments, the patterned resist layer is coated with a treatment material, where a first portion of the treatment material bonds to surfaces of the patterned resist layer. In some embodiments, a second portion of the treatment material (e.g., not bonded to surfaces of the patterned resist layer) is removed, thereby providing a treated patterned resist layer, where the treated patterned resist layer has a second line width roughness less than the first line width roughness.Type: GrantFiled: June 1, 2020Date of Patent: January 28, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Siao-Shan Wang, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
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Patent number: 12204163Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: GrantFiled: February 5, 2024Date of Patent: January 21, 2025Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
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Publication number: 20240419029Abstract: An electronic device includes a light scattering switching element, a light absorbing switching element and a thermal insulation layer. The light absorbing switching element is disposed opposite to the light scattering switching element. The thermal insulation layer is disposed between the light scattering switching element and the light absorbing switching element, wherein the thermal conductivity of the thermal insulation layer is less than 50×10?3 W·m?1·K?1.Type: ApplicationFiled: May 15, 2024Publication date: December 19, 2024Inventors: Ming-Che HUANG, Rong-Jyun LIN, I-Wen YANG, Chien-Chih LIU, Ching-Shan LIN, Chi-Chau LIN
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Publication number: 20240401235Abstract: A silicon carbide wafer and a method of fabricating the same are provided. In the silicon carbide wafer, a ratio (V:N) of a vanadium concentration to a nitrogen concentration is in a range of 2:1 to 10:1, and a portion of the silicon carbide wafer having a resistivity greater than 1012 ?·cm accounts for more than 85% of an entire wafer area of the silicon carbide wafer.Type: ApplicationFiled: August 12, 2024Publication date: December 5, 2024Applicant: GlobalWafers Co., Ltd.Inventors: Ching-Shan Lin, Chien-Cheng Liou, Jian-Hsin Lu
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Publication number: 20240371945Abstract: A silicon carbide substrate includes an N-type silicon carbide substrate having a first surface and a second surface opposite to the first surface. The N-type silicon carbide substrate includes a semi-insulating silicon carbide region and an N-type silicon carbide region. The semi-insulating silicon carbide region extends inward from the first surface into the N-type silicon carbide substrate to a depth. The semi-insulating silicon carbide region includes nitrogen and a first dopant. The first dopant includes at least one of group VB elements, group VIIA elements, argon and silicon. The N-type silicon carbide region is adjacent to the semi-insulating silicon carbide region and includes nitrogen element.Type: ApplicationFiled: April 30, 2024Publication date: November 7, 2024Applicant: GlobalWafers Co., Ltd.Inventors: Ying-Ru Shih, Chih Shan Tan, Chung Chi Yang, Ching-Shan Lin
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Publication number: 20240359991Abstract: A method of fabricating a silicon carbide material is provided. The method includes the following steps. A first annealing process is performed on a wafer or on an ingot that forms the wafer after wafer slicing. The conditions of the first annealing process include: a heating rate of 10° C./minute to 30° C./minute, an annealing temperature of 2000° C. or less, and a constant temperature annealing time of 2 minutes or more and 4 hours or less for performing the first annealing process. After performing the first annealing process, an average resistivity of the wafer or the ingot is greater than 1010?·cm.Type: ApplicationFiled: July 12, 2024Publication date: October 31, 2024Applicant: GlobalWafers Co., Ltd.Inventor: Ching-Shan Lin
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Patent number: 12123105Abstract: A crystal growth method, including providing a seed crystal in a crystal growth furnace, and forming a crystal on the seed crystal along a first direction after multiple time points, is provided. The crystal includes multiple sub-crystals stacked along the first direction, a corresponding one of the sub-crystals is formed at each of the time points, and the sub-crystals include multiple end surfaces away from the seed crystal, so that a difference value of maximum temperatures of any two of the end surfaces is less than or equal to 20 degrees. A wafer is also provided.Type: GrantFiled: June 30, 2023Date of Patent: October 22, 2024Assignee: GlobalWafers Co., Ltd.Inventors: Ching-Shan Lin, Ye-Jun Wang, Chien-Cheng Liou
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Publication number: 20240271322Abstract: A silicon carbide ingot is provided, which includes a seed end, and a dome end opposite to the seed end. In the silicon carbide ingot, a ratio of the vanadium concentration to the nitrogen concentration at the seed end is in a range of 5:1 to 11:1, and a ratio of the vanadium concentration to the nitrogen concentration at the dome end is in a range of 2:1 to 11:1.Type: ApplicationFiled: April 24, 2024Publication date: August 15, 2024Applicant: GlobalWafers Co., Ltd.Inventor: Ching-Shan Lin
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Patent number: 11987902Abstract: A manufacturing method of a silicon carbide wafer includes the following. A raw material containing carbon and silicon and a seed located above the raw material are provided in a reactor. A nitrogen content in the reactor is reduced, which includes the following. An argon gas is passed into the reactor, where a flow rate of passing the argon gas into the reactor is 1,000 sccm to 5,000 sccm, and a time of passing the argon gas into the reactor is 2 hours to 48 hours. The reactor and the raw material are heated to form a silicon carbide material on the seed. The reactor and the raw material are cooled to obtain a silicon carbide ingot. The silicon carbide ingot is cut to obtain a plurality of silicon carbide wafers. A semiconductor structure is also provided.Type: GrantFiled: July 27, 2021Date of Patent: May 21, 2024Assignee: GlobalWafers Co., Ltd.Inventor: Ching-Shan Lin
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Patent number: 11952676Abstract: A silicon carbide crystal includes a seed layer, a bulk layer and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.Type: GrantFiled: October 16, 2020Date of Patent: April 9, 2024Assignee: GLOBALWAFERS CO., LTD.Inventors: Ching-Shan Lin, Jian-Hsin Lu, Chien-Cheng Liou, Man-Hsuan Lin
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Publication number: 20240011188Abstract: A method of growing the silicon carbide crystal includes the following steps. A raw material containing a carbon element and a silicon element, and a seed crystal located above the raw material are provided in a reactor. A growth process of the silicon carbide crystal is performed, wherein the growth process includes heating the reactor and the raw material to form silicon carbide crystal on the seed crystal. In the growth process, a ratio difference (?Tz/?Tx) between an axial temperature gradient (?Tz) and a radial temperature gradient (?Tx) of the silicon carbide crystal is adjusted so that the ratio difference is controlled in the range of 0.5 to 3 to form the silicon carbide crystal. The silicon carbide crystal formed by the above growth method can have a uniform resistivity distribution and excellent geometric performance.Type: ApplicationFiled: June 30, 2023Publication date: January 11, 2024Applicant: GlobalWafers Co., Ltd.Inventor: Ching-Shan Lin
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Publication number: 20240011190Abstract: A silicon carbide crystal and a silicon carbide wafer, wherein a monocrystalline proportion of the silicon carbide crystal and the silicon carbide wafer is 100%, the resistivity thereof is in a range of 15 m?·cm to 20 m?·cm, and a deviation of an uniformity of the resistivity thereof is less than 0.4%.Type: ApplicationFiled: June 30, 2023Publication date: January 11, 2024Applicant: GlobalWafers Co., Ltd.Inventor: Ching-Shan Lin
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Publication number: 20240011185Abstract: A crystal growing method for crystals include the following steps. A first crystal seed is provided, the first crystal seed has a first monocrystalline proportion and a first size. N times of crystal growth processes are performed on the first crystal seed, wherein each of the crystal growth process will increase the monocrystalline proportion, and the N times of crystal growth processes are performed until a second crystal having a monocrystalline proportion of 100% is reached, and wherein the N times includes more than 3 times of crystal growth processes. Each crystal growth process includes adjusting a ratio difference (?Tz/?Tx) between an axial temperature gradient (?Tz) and a radial temperature gradient (?Tx) of the crystal, so as to control the ratio difference within a range of 0.5 to 3 for forming the second crystal.Type: ApplicationFiled: June 30, 2023Publication date: January 11, 2024Applicant: GlobalWafers Co., Ltd.Inventor: Ching-Shan Lin
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Publication number: 20240011186Abstract: A crystal growth method, including providing a seed crystal in a crystal growth furnace, and forming a crystal on the seed crystal along a first direction after multiple time points, is provided. The crystal includes multiple sub-crystals stacked along the first direction, a corresponding one of the sub-crystals is formed at each of the time points, and the sub-crystals include multiple end surfaces away from the seed crystal, so that a difference value of maximum temperatures of any two of the end surfaces is less than or equal to 20 degrees. A wafer is also provided.Type: ApplicationFiled: June 30, 2023Publication date: January 11, 2024Applicant: GlobalWafers Co., Ltd.Inventors: Ching-Shan Lin, Ye-Jun Wang, Chien-Cheng Liou
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Publication number: 20240011187Abstract: A crystal growth furnace system, including an external heating module, a furnace, a first driven device, a second driven device, and a control device, is provided. The furnace is movably disposed in the external heating module. The first driven device drives the furnace to move along an axis. The second driven device drives the furnace to rotate around the axis. The control device is electrically connected to the first driven device, the second driven device, and the external heating module.Type: ApplicationFiled: June 30, 2023Publication date: January 11, 2024Applicant: GlobalWafers Co., Ltd.Inventors: Ching-Shan Lin, Ye-Jun Wang, Chien-Cheng Liou
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Patent number: 11859306Abstract: A manufacturing method of a silicon carbide ingot includes the following. A raw material containing carbon and silicon and a seed located above the raw material are provided in a reactor. A first surface of the seed faces the raw material. The reactor and the raw material are heated, where part of the raw material is vaporized and transferred to the first surface of the seed and a sidewall of the seed and forms a silicon carbide material on the seed, to form a growing body containing the seed and the silicon carbide material. The growing body grows along a radial direction of the seed, and the growing body grows along a direction perpendicular to the first surface of the seed. The reactor and the raw material are cooled to obtain a silicon carbide ingot. A diameter of the silicon carbide ingot is greater than a diameter of the seed.Type: GrantFiled: July 27, 2021Date of Patent: January 2, 2024Assignee: GlobalWafers Co., Ltd.Inventor: Ching-Shan Lin
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Patent number: 11821105Abstract: The disclosure provides a silicon carbide seed crystal and a method of manufacturing a silicon carbide ingot. The silicon carbide seed crystal has a silicon surface and a carbon surface opposite to the silicon surface. A difference D between a basal plane dislocation density BPD1 of the silicon surface and a basal plane dislocation density BPD2 of the carbon surface satisfies the following formula (1), a local thickness variation (LTV) of the silicon carbide seed crystal is 2.5 ?m or less, and a stacking fault (SF) density of the silicon carbide seed crystal is 10 EA/cm2 or less: D=(BPD1?BPD2)/BPD1?25%??(1).Type: GrantFiled: July 27, 2021Date of Patent: November 21, 2023Assignee: GlobalWafers Co., Ltd.Inventor: Ching-Shan Lin
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Patent number: 11788204Abstract: A silicon carbide wafer is provided, wherein within a range area of 5 mm from an edge of the silicon carbide wafer, there are no low angle grain boundaries formed by clustering of basal plane dislocation defects, and the silicon carbide wafer has a bowing of less than 15 ?m.Type: GrantFiled: July 27, 2021Date of Patent: October 17, 2023Assignee: GlobalWafers Co., Ltd.Inventor: Ching-Shan Lin
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Patent number: 11781241Abstract: A silicon carbide seed crystal and method of manufacturing the same, and method of manufacturing silicon carbide ingot are provided. The silicon carbide seed crystal has a silicon surface and a carbon surface opposite to the silicon surface. A difference D between a basal plane dislocation density BPD1 of the silicon surface BPD1 and a basal plane dislocation density BPD2 of the carbon surface satisfies the following formula (1): D=(BPD1?BPD2)/BPD1?25%??(1).Type: GrantFiled: July 27, 2021Date of Patent: October 10, 2023Assignee: GlobalWafers Co., Ltd.Inventor: Ching-Shan Lin