Patents by Inventor Ching-Wei Liao

Ching-Wei Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240371785
    Abstract: A package structure including a chip, an encapsulant, a first redistribution circuit structure, a second redistribution circuit structure, a conductive member, and a coded structure is provided. The encapsulant has a first encapsulating surface and a second encapsulating surface opposite thereto. The encapsulant covers the chip. The first redistribution circuit structure is disposed on the first encapsulating surface of the encapsulant. The second redistribution circuit structure is disposed on the second encapsulating surface of the encapsulant. The chip is electrically connected to the first redistribution circuit structure or the second redistribution circuit structure. The conductive member penetrates through the encapsulant to be electrically connected to the first redistribution circuit structure and the second redistribution circuit structure. The coded structure is disposed on the second redistribution circuit structure. The coded structure includes a readable coded pattern.
    Type: Application
    Filed: March 19, 2024
    Publication date: November 7, 2024
    Applicant: Powertech Technology Inc.
    Inventors: Ching-Wei Liao, Shang-Yu Chang Chien
  • Publication number: 20240030198
    Abstract: A package structure and a manufacturing method thereof are provided. The package structure includes a redistribution layer, a conductive element, an active chip, an encapsulation layer, another redistribution layer, and a conductive terminal. The conductive element, the active chip, and the encapsulation layer are disposed on the redistribution layer and the encapsulation layer surrounds the conductive element and the active chip. The another redistribution layer is disposed on the conductive element, the active chip and the encapsulation layer and electrically connected to the redistribution layer through the conductive element.
    Type: Application
    Filed: June 2, 2023
    Publication date: January 25, 2024
    Applicant: POWERTECH TECHNOLOGY INC.
    Inventors: Ching-Wei Liao, Shang-Yu Chang Chien
  • Publication number: 20240021595
    Abstract: A package structure and a manufacturing method thereof are provided. The package structure includes a first package and a second package, and the second package is disposed on the first package. The first package includes a first redistribution layer, at least one chip and a second redistribution layer. The chip is disposed between the first redistribution layer and the second redistribution layer. The second package includes a third redistribution layer and at least three light-emitting elements. The third redistribution layer is electrically connected to the second redistribution layer, and the second redistribution layer is disposed between the chip and the third redistribution layer. The light-emitting elements are disposed on the third redistribution layer and electrically connected to the third redistribution layer. Each light-emitting element includes a first surface opposite to the third redistribution layer, and the first surfaces of the light-emitting elements are coplanar.
    Type: Application
    Filed: June 14, 2023
    Publication date: January 18, 2024
    Applicant: POWERTECH TECHNOLOGY INC.
    Inventors: Ching-Wei Liao, Shang-Yu Chang Chien
  • Publication number: 20240021640
    Abstract: A package structure and a manufacturing method thereof are provided. The package structure includes a plurality of micro-lens chips arranged at intervals and a coplanar control layer. The coplanar control layer is configured to encapsulate the plurality of micro-lens chips therein. At least one surface of each of the micro-lens chips is exposed outside the coplanar control layer, and the at least one surface of each of the micro-lens chips is coplanar.
    Type: Application
    Filed: July 11, 2023
    Publication date: January 18, 2024
    Inventors: Ching-Wei LIAO, Shang-yu CHANG CHIEN
  • Publication number: 20230110079
    Abstract: A fan-out package structure and a manufacturing method thereof are provided. The fan-out package structure includes an upper redistribution layer, a die, a passive element, and an active element. The upper redistribution layer includes a first surface and a second surface opposite to the first surface. The die is disposed on the first surface of the upper redistribution layer and is electrically connected to the upper redistribution layer. The passive element is disposed on the second surface of the upper redistribution layer and is electrically connected to the upper redistribution layer. The active element is disposed on the second surface of the upper redistribution layer and is electrically connected to the upper redistribution layer. The active element is laterally adjacent to the passive element, and the die is electrically connected to the active element and the passive element through the upper redistribution layer.
    Type: Application
    Filed: August 20, 2022
    Publication date: April 13, 2023
    Applicant: POWERTECH TECHNOLOGY INC.
    Inventors: Pei-chun Tsai, Hung-hsin Hsu, Ching-wei Liao, Shang-yu Chang Chien
  • Publication number: 20050037451
    Abstract: A method of water analysis for detecting the presence of microorganisms in a water sample, comprising the steps of: first, providing a bio-membrane as a filter; filtering out the microorganisms in the water sample, using the bio-membrane; cultivating the microorganisms on the bio-membrane; staining the microorganisms on the bio-membrane with potassium permanganate (KMnO4); rinsing the bio-membrane with purified deionized water; and finally, counting microorganisms.
    Type: Application
    Filed: April 1, 2004
    Publication date: February 17, 2005
    Inventors: Bo-Cun Chen, Chiao-Chung Huang, Ching-Wei Liao, Guo-Ming Huang