Patents by Inventor Ching-Wei Yeh

Ching-Wei Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6433577
    Abstract: An assembling method for a low-power programmable logic array circuit. The assembling method is capable of reducing delays and unnecessary power consumption. According to the low potential power loss when the dynamic gates in the AND-plane and the OR-plane output a low potential, the high potential power loss when the dynamic gates in the AND-plane and the OR-plane output a high potential and the probability of the dynamic gates outputting a high potential, a selection between new dynamic logic circuit and conventional dynamic circuit is carried out.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: August 13, 2002
    Assignee: National Chung Cheng University
    Inventors: Jinn-Shyan Wang, Ching-Rong Chang, Ching-Wei Yeh