Patents by Inventor Ching-Wen CHAN

Ching-Wen CHAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240090216
    Abstract: In a method of manufacturing a semiconductor device, the semiconductor device includes a non-volatile memory formed in a memory cell area and a ring structure area surrounding the memory cell area. In the method, a protrusion of a substrate is formed in the ring structure area. The protrusion protrudes from an isolation insulating layer. A high-k dielectric film is formed, thereby covering the protrusion and the isolation insulating layer. A poly silicon film is formed over the high-k dielectric film. The poly silicon film and the high-k dielectric film are patterned. Insulating layers are formed over the patterned poly silicon film and high-k dielectric film, thereby sealing the patterned high-k dielectric film.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Han LIN, Chih-Ren HSIEH, Ching-Wen CHAN
  • Publication number: 20240061085
    Abstract: A LIDAR system includes a laser source configured to generate laser light pulses, a first DMD, a second DMD and a two-dimensional (2D) sensor array. The first DMD is configured to receive the laser light pulses and diffractively steer the light pulses to sequentially illuminate different sub-regions within the extended region. The second DMD is configured to receive reflected light pulses from the different sub-regions in a sequential manner as each of the different sub-regions is illuminated by the light pulses. The 2D sensor array configured to receive reflected light pulses from the second DMD and form an image of the different sub-regions as the reflected light pulses from each of the different sub-regions is sequentially received from the second DMD.
    Type: Application
    Filed: August 18, 2023
    Publication date: February 22, 2024
    Inventors: Yuzuru TAKASHIMA, Jeff Ching-Wen CHAN, Xianyue DENG
  • Publication number: 20240047219
    Abstract: An integrated circuit device includes a substrate, an isolation feature, a memory cell, and a semiconductor device. The substrate has a cell region, a peripheral region, and a transition region between the cell region and the peripheral region. The isolation feature is in the transition region. A top surface of the isolation feature has a first portion and a second portion lower than the first portion, the second portion of the top surface of the isolation feature is between the cell region and the first portion of the top surface of the isolation feature, and a bottom surface of the isolation feature has a step height directly below the second portion of the top surface of the isolation feature. The is memory cell over the cell region of the substrate. The semiconductor device is over the peripheral region of the substrate.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 8, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han LIN, Chih-Ren HSIEH, Chih-Pin HUANG, Ching-Wen CHAN
  • Patent number: 11864381
    Abstract: In a method of manufacturing a semiconductor device, the semiconductor device includes a non-volatile memory formed in a memory cell area and a ring structure area surrounding the memory cell area. In the method, a protrusion of a substrate is formed in the ring structure area. The protrusion protrudes from an isolation insulating layer. A high-k dielectric film is formed, thereby covering the protrusion and the isolation insulating layer. A poly silicon film is formed over the high-k dielectric film. The poly silicon film and the high-k dielectric film are patterned. Insulating layers are formed over the patterned poly silicon film and high-k dielectric film, thereby sealing the patterned high-k dielectric film.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: January 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Han Lin, Chih-Ren Hsieh, Ching-Wen Chan
  • Patent number: 11854823
    Abstract: An integrated circuit device includes a substrate, a first isolation feature, a memory cell, and a semiconductor device. The substrate has a cell region, a peripheral region, and a transition region between the cell region and the peripheral region. The first isolation feature is in the transition region. The substrate includes a protrusion portion between a first portion and a second portion of the first isolation feature, the second portion is between the first portion and the cell region, and a top surface of the first portion of the first isolation feature has a first part and a second part lower than the first part, and the second part is between the first part and the second portion of the first isolation feature. The memory cell is over the cell region of the substrate. The semiconductor device is over the peripheral region of the substrate.
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han Lin, Chih-Ren Hsieh, Chih-Pin Huang, Ching-Wen Chan
  • Publication number: 20220139718
    Abstract: An integrated circuit device includes a substrate, a first isolation feature, a memory cell, and a semiconductor device. The substrate has a cell region, a peripheral region, and a transition region between the cell region and the peripheral region. The first isolation feature is in the transition region. The substrate includes a protrusion portion between a first portion and a second portion of the first isolation feature, the second portion is between the first portion and the cell region, and a top surface of the first portion of the first isolation feature has a first part and a second part lower than the first part, and the second part is between the first part and the second portion of the first isolation feature. The memory cell is over the cell region of the substrate. The semiconductor device is over the peripheral region of the substrate.
    Type: Application
    Filed: January 12, 2022
    Publication date: May 5, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han LIN, Chih-Ren HSIEH, Chih-Pin HUANG, Ching-Wen CHAN
  • Publication number: 20220123002
    Abstract: In a method of manufacturing a semiconductor device, the semiconductor device includes a non-volatile memory formed in a memory cell area and a ring structure area surrounding the memory cell area. In the method, a protrusion of a substrate is formed in the ring structure area. The protrusion protrudes from an isolation insulating layer. A high-k dielectric film is formed, thereby covering the protrusion and the isolation insulating layer. A poly silicon film is formed over the high-k dielectric film. The poly silicon film and the high-k dielectric film are patterned. Insulating layers are formed over the patterned poly silicon film and high-k dielectric film, thereby sealing the patterned high-k dielectric film.
    Type: Application
    Filed: January 3, 2022
    Publication date: April 21, 2022
    Inventors: Meng-Han LIN, Chih-Ren HSIEH, Ching-Wen CHAN
  • Patent number: 11239089
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a first isolation feature in a peripheral region of a substrate; recessing the cell region of the substrate after forming the first isolation feature; forming a second isolation feature in a cell region of the substrate after recessing the cell region of the substrate; forming a plurality of control gates over the cell region of the substrate; and forming a gate stack over the peripheral region of the substrate.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: February 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han Lin, Chih-Ren Hsieh, Chih-Pin Huang, Ching-Wen Chan
  • Patent number: 11217597
    Abstract: In a method of manufacturing a semiconductor device, the semiconductor device includes a non-volatile memory formed in a memory cell area and a ring structure area surrounding the memory cell area. In the method, a protrusion of a substrate is formed in the ring structure area. The protrusion protrudes from an isolation insulating layer. A high-k dielectric film is formed, thereby covering the protrusion and the isolation insulating layer. A poly silicon film is formed over the high-k dielectric film. The poly silicon film and the high-k dielectric film are patterned. Insulating layers are formed over the patterned poly silicon film and high-k dielectric film, thereby sealing the patterned high-k dielectric film.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: January 4, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han Lin, Chih-Ren Hsieh, Ching-Wen Chan
  • Publication number: 20210183659
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a first isolation feature in a peripheral region of a substrate; recessing the cell region of the substrate after forming the first isolation feature; forming a second isolation feature in a cell region of the substrate after recessing the cell region of the substrate; forming a plurality of control gates over the cell region of the substrate; and forming a gate stack over the peripheral region of the substrate.
    Type: Application
    Filed: December 16, 2019
    Publication date: June 17, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han LIN, Chih-Ren HSIEH, Chih-Pin HUANG, Ching-Wen CHAN