Abstract: A semiconductor device includes a channel region; a gate dielectric over the channel region; a gate electrode over the gate dielectric; and a first source/drain region adjacent the gate dielectric. The first source/drain region is of a first conductivity type. At least one of the channel region and the first source/drain region includes a superlattice structure. The semiconductor device further includes a second source/drain region on an opposite side of the channel region than the first source/drain region. The second source/drain region is of a second conductivity type opposite the first conductivity type. At most, one of the first source/drain region and the second source/drain region comprises an additional superlattice structure.

Abstract: A semiconductor structure includes a semiconductor substrate; a gate dielectric over the semiconductor substrate; a gate electrode over the gate dielectric; a source/drain region adjacent the gate dielectric; a silicide region on the source/drain region; a metal layer on top of, and physical contacting, the silicide region; an inter-layer dielectric (ILD) over the metal layer; and a contact opening in the ILD. The metal layer is exposed through the contact opening. The metal layer further extends under the ILD. The semiconductor structure further includes a contact in the contact opening.

Abstract: A method and apparatus involve providing a substrate having a dielectric layer formed thereon, forming a photoresist mask over the dielectric layer, the photoresist mask defining an opening, etching the dielectric layer through the at least one opening in the photoresist mask, treating a portion of the photoresist mask with an etching species, and removing the treated photoresist mask with a supercritical fluid. The etching, treating, and removing can be performed in one chamber.

Abstract: A semiconductor device includes a channel region; a gate dielectric over the channel region; a gate electrode over the gate dielectric; and a first source/drain region adjacent the gate dielectric. The first source/drain region is of a first conductivity type. At least one of the channel region and the first source/drain region includes a superlattice structure. The semiconductor device further includes a second source/drain region on an opposite side of the channel region than the first source/drain region. The second source/drain region is of a second conductivity type opposite the first conductivity type. At most, one of the first source/drain region and the second source/drain region comprises an additional superlattice structure.

Abstract: A semiconductor device includes a channel region; a gate dielectric over the channel region; a gate electrode over the gate dielectric; and a first source/drain region adjacent the gate dielectric. The first source/drain region is of a first conductivity type. At least one of the channel region and the first source/drain region includes a superlattice structure. The semiconductor device further includes a second source/drain region on an opposite side of the channel region than the first source/drain region. The second source/drain region is of a second conductivity type opposite the first conductivity type. At most, one of the first source/drain region and the second source/drain region comprises an additional superlattice structure.

Abstract: A semiconductor structure includes a semiconductor substrate; a gate dielectric over the semiconductor substrate; a gate electrode over the gate dielectric; a source/drain region adjacent the gate dielectric; a silicide region on the source/drain region; a metal layer on top of, and physical contacting, the silicide region; an inter-layer dielectric (ILD) over the metal layer; and a contact opening in the ILD. The metal layer is exposed through the contact opening. The metal layer further extends under the ILD. The semiconductor structure further includes a contact in the contact opening.

Abstract: A semiconductor structure includes a semiconductor substrate; a gate dielectric over the semiconductor substrate; a gate electrode over the gate dielectric; a source/drain region adjacent the gate dielectric; a silicide region on the source/drain region; a metal layer on top of, and physical contacting, the silicide region; an inter-layer dielectric (ILD) over the metal layer; and a contact opening in the ILD. The metal layer is exposed through the contact opening. The metal layer further extends under the ILD. The semiconductor structure further includes a contact in the contact opening.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate, forming a dielectric layer over the semiconductor substrate, treating the dielectric layer with a carbon containing group, forming a conductive layer over the treated dielectric layer, and patterning and etching the dielectric layer and conductive layer to form a gate structure. The carbon containing group includes an OCH3 or CN species.

Abstract: Low dielectric constant dielectric films having a high degree of porosity suffer from poor mechanical strength and can be damaged during processing steps. Damage can be substantially eliminated or minimized by stuffing the pores of the dielectric film with a material that substantially fills the pores. The stuffing material should have low surface tension and viscosity to provide good wetting. Alternatively, the stuffing material can be dissolved in a wetting carrier fluid, such as supercritical carbon dioxide and the like.

Abstract: The present invention discloses a semiconductor source/drain contact structure, which comprises a substrate, a source/drain region disposed in the substrate, at least one non-silicided conductive layer including a barrier layer disposed over and in contact with the source/drain region, and one or more contact hole filling metals disposed over and in contact with the at least one non-silicided conductive layer, wherein a first contact area between the at least one non-silicided conductive layer and the source/drain region is substantially larger than a second contact area between the one or more contact hole filling metals and the at least one non-silicided conductive layer.

Abstract: The present invention discloses a semiconductor source/drain contact structure, which comprises a substrate, a source/drain region disposed in the substrate, at least one non-silicided conductive layer including a barrier layer disposed over and in contact with the source/ drain region, and one or more contact hole filling metals disposed over and in contact with the at least one non-silicided conductive layer, wherein a first contact area between the at least one non-silicided conductive layer and the source/drain region is substantially larger than a second contact area between the one or more contact hole filling metals and the at least one non-silicided conductive layer.

Abstract: A semiconductor structure includes a semiconductor substrate; a gate dielectric over the semiconductor substrate; a gate electrode over the gate dielectric; a source/drain region adjacent the gate dielectric; a silicide region on the source/drain region; a metal layer on top of, and physical contacting, the silicide region; an inter-layer dielectric (ILD) over the metal layer; and a contact opening in the ILD. The metal layer is exposed through the contact opening. The metal layer further extends under the ILD. The semiconductor structure further includes a contact in the contact opening.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate, forming a dielectric layer over the semiconductor substrate, treating the dielectric layer with a carbon containing group, forming a conductive layer over the treated dielectric layer, and patterning and etching the dielectric layer and conductive layer to form a gate structure. The carbon containing group includes an OCH3 or CN species.

Abstract: A method for treating an inter-metal dielectric (IMD) layer to improve a mechanical strength and/or repair plasma etching damage including providing a low-K silicon oxide containing dielectric insulating layer; and carrying out a super critical fluid treatment of the low-K dielectric insulating layer including supercritical CO2 and a solvent including a silicon bond forming substituent having a bonding energy greater than a Si—H to replace at least a portion of the Si—H bonds with the silicon bond forming substituent.

Abstract: A method and apparatus involve providing a substrate having a dielectric layer formed thereon, forming a photoresist mask over the dielectric layer, the photoresist mask defining an opening, etching the dielectric layer through the at least one opening in the photoresist mask, treating a portion of the photoresist mask with an etching species, and removing the treated photoresist mask with a supercritical fluid. The etching, treating, and removing can be performed in one chamber.

Abstract: An organic layer, such as a porous low-K dielectric in an IC, contains pores open at its surface. To close the pores, the organic layer is contacted by a supercritical fluid that is a solvent for the layer. After a small amount of the surface and the wall of the open pores is solvated, a phase transition of the solvated organic material is effected at the surface to cover it with a dense, smooth, non-porous film that seals the open pores.

Abstract: A method for forming a damascene structure by providing a single process solution for resist ashing while avoiding and repairing plasma etching damage as well as removing absorbed moisture in the dielectric layer, the method including providing a substrate comprising an uppermost photoresist layer and an opening extending through a thickness of an inter-metal dielectric (IMD) layer to expose an underlying metal region; and, carrying out at least one supercritical fluid treatment comprising supercritical CO2, a first co-solvent, and an additive selected from the group consisting of a metal corrosion inhibitor and a metal anti-oxidation agent to remove the uppermost photoresist layer, as well as including an optional dielectric insulating layer bond forming agent.

Abstract: A semiconductor structure having a pore sealed portion of a dielectric layer is provided. Exposed pores of the dielectric material are sealed using an anisotropic plasma so that pores along the bottom of the opening are sealed, and pores along sidewalls of the opening remain relatively untreated by the plasma. Thereafter, one or more barrier layers may be formed and the opening may be filled with a conductive material. The barrier layers formed over the sealing layer exhibits a more continuous barrier layer. The pores may be partially or completely sealed by plasma bombardment or ion implantation using a gas selected from one of O2, an O2/N2 mixture, H2O, or combinations thereof.

Abstract: A method of forming a low-k dielectric layer and forming a structure in the low-k dielectric layer includes depositing a low-k dielectric layer over a substrate, performing a first treatment to the low-k dielectric layer, performing post-formation processes, and performing a second treatment to the low-k dielectric layer. The k value of the low-k dielectric layer is lowered by the first treatment. The post-formation processes performed to the low-k dielectric layer include at least one low-k dielectric material damaging process. The second treatment restores the low-k dielectric layer. Preferably, each of the first and second treatments includes a curing process selected from e-beam curing, ultraviolet curing, plasma curing, SCCO2 cleaning, and combinations thereof.

Abstract: A method for forming a damascene structure by providing a single process solution for resist ashing while avoiding and repairing plasma etching damage as well as removing absorbed moisture in the dielectric layer, the method including providing a substrate comprising an uppermost photoresist layer and an opening extending through a thickness of an inter-metal dielectric (IMD) layer to expose an underlying metal region; and, carrying out at least one supercritical fluid treatment comprising supercritical CO2, a first co-solvent, and an additive selected from the group consisting of a metal corrosion inhibitor and a metal anti-oxidation agent to remove the uppermost photoresist layer, as well as including an optional dielectric insulating layer bond forming agent.