Patents by Inventor Ching Yi Lee
Ching Yi Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250116805Abstract: A key structure includes a light source and a light guiding assembly, a transparent cover, a semi-transparent and semi-reflective mirror, and a reflection mirror disposed above the light source. The light guiding assembly includes a center column and a platform surrounding the center column. A bottom surface of the center column faces the light source. The transparent cover is disposed on the light guiding assembly and covers the center column and the platform. An exterior side wall of the transparent cover has strip recesses surrounding the center column and the platform. The reflection mirror is disposed in the light guiding assembly. The reflection mirror and the semi-transparent and semi-reflective mirror face each other through the transparent cover. A part of light generated by the light source generates an infinity reflection between the strip recesses, the reflection mirror, and the semi-transparent and semi-reflective mirror after passing through the light guiding assembly.Type: ApplicationFiled: August 6, 2024Publication date: April 10, 2025Applicant: Acer IncorporatedInventors: Ching-Yi Lu, Ming-Cheng Wu, Yi-Heng Lee
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Patent number: 12271017Abstract: A key structure includes a light source and a light guiding assembly, a transparent cover, a semi-transparent and semi-reflective mirror, and a reflection mirror disposed above the light source. The light guiding assembly includes a center column and a platform surrounding the center column. A bottom surface of the center column faces the light source. The transparent cover is disposed on the light guiding assembly and covers the center column and the platform. An exterior side wall of the transparent cover has strip recesses surrounding the center column and the platform. The reflection mirror is disposed in the light guiding assembly. The reflection mirror and the semi-transparent and semi-reflective mirror face each other through the transparent cover. A part of light generated by the light source generates an infinity reflection between the strip recesses, the reflection mirror, and the semi-transparent and semi-reflective mirror after passing through the light guiding assembly.Type: GrantFiled: August 6, 2024Date of Patent: April 8, 2025Assignee: Acer IncorporatedInventors: Ching-Yi Lu, Ming-Cheng Wu, Yi-Heng Lee
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Publication number: 20250079313Abstract: A semiconductor structure including a first dielectric layer and a conductive pattern is provided. The conductive pattern is disposed in the first dielectric layer, wherein the conductive pattern comprises an alloy layer and a first conductive layer, the alloy layer surrounds sidewalls and a bottom surface of the first conductive layer, a material of the alloy layer comprises an alloy of at least two metals, and at least one of the at least two metals relative to the rest of the at least two metals tends to be reacted with a dielectric material of the first dielectric layer.Type: ApplicationFiled: September 4, 2023Publication date: March 6, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cian-Yu Chen, Chin-Lung Chung, Yun-Chi Chiang, Han-Tang Hung, Meng-Pei Lu, Shin-Yi Yang, Ming-Han Lee, Ching-Fu Yeh
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Publication number: 20250060660Abstract: A method includes: generating a designed mask overlay mark associated with an actual mask overlay mark to be formed in a mask; forming the actual mask overlay mark in the mask based on the designed mask overlay mark, the actual mask overlay mark including a plurality of overlay patterns; forming a device feature pattern adjacent to the actual mask overlay mark; forming an alignment of the mask by a mask metrology apparatus including a light source having a wavelength and a numerical aperture, wherein a pitch between adjacent two of the plurality of overlay patterns does not exceed the wavelength divided by twice the numerical aperture; and forming a pattern in a layer of a wafer by transferring the device feature pattern while the mask is under the alignment.Type: ApplicationFiled: January 3, 2024Publication date: February 20, 2025Inventors: Cheng-Yeh LEE, Ching-Fang YU, Hsueh-Wei HUANG, Yen-Cheng HO, Wei-Cheng LIN, Hsin-Yi YIN
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Patent number: 12230585Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. An alignment process is performed on a first semiconductor workpiece and a second semiconductor workpiece by virtue of a plurality of workpiece pins. The first semiconductor workpiece is bonded to the second semiconductor workpiece. A shift value is determined between the first and second semiconductor workpieces by virtue of a first plurality of alignment marks on the first semiconductor workpiece and a second plurality of alignment marks on the second semiconductor workpiece. A layer of an integrated circuit (IC) structure is formed over the second semiconductor workpiece based at least in part on the shift value.Type: GrantFiled: January 24, 2024Date of Patent: February 18, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yeong-Jyh Lin, Ching I Li, De-Yang Chiou, Sz-Fan Chen, Han-Jui Hu, Ching-Hung Wang, Ru-Liang Lee, Chung-Yi Yu
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Patent number: 12217989Abstract: A semiconductor apparatus and a method for collecting residues of curable material are provided. The semiconductor apparatus includes a chamber containing a wafer cassette, and a collecting module disposed in the chamber for collecting residues of curable material in the chamber. The collecting module includes a flow-directing structure disposed below a ceiling of the chamber, a baffle structure disposed below the flow-directing structure, and a tray disposed on the wafer cassette. The flow-directing structure includes a first hollow region, the baffle structure includes a second hollow region, and the tray is moved together with the wafer cassette to pass through the second hollow region of the baffle structure and is positioned to cover the first hollow region of the flow-directing structure.Type: GrantFiled: August 5, 2021Date of Patent: February 4, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ping-Cheng Lin, Pin-Yi Hsin, Ching Shun Lee, Bo-Han Huang, Cheng-tsung Tu
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Patent number: 7683487Abstract: A structure applied to a photolithographic process is provided. The structure includes at least a film layer, an optical isolation layer, an anti-reflection coating and a photoresist layer sequentially formed over a substrate. In the photolithographic process, the optical isolation layer stops light from penetrating down to the film layer. Since the optical isolation layer is set up underneath the photoresist layer, light emitted from a light source during photo-exposure is prevented from reflecting from the substrate surface after passing through the film layer. Thus, the critical dimensions of the photolithographic process are unaffected by any change in the thickness of the film layer.Type: GrantFiled: January 19, 2006Date of Patent: March 23, 2010Assignee: Macronix International Co., Ltd.Inventors: Shun-Li Lin, Yun-Chu Lin, Wen-Chung Chang, Ching-Yi Lee
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Publication number: 20070031132Abstract: A porous ceramic carrier includes at least one substrate integrally formed with a functional far infrared material and having an inside formed with a plurality of through holes, and an electrothermal film layer coated on a surface of each of the through holes of the substrate. Thus, the porous ceramic carrier has a rapid heat circulation effect by provision of the electrothermal film layer, thereby enhancing the heat circulation efficiency of the porous ceramic carrier.Type: ApplicationFiled: July 12, 2005Publication date: February 8, 2007Inventor: Ching-Yi Lee
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Publication number: 20060257126Abstract: A cooling/heating fan apparatus includes a protective shade, a fan motor having a propeller shaft extended into the protective shade, an impeller mounted on a distal end of the propeller shaft, at least one porous ceramic carrier mounted on the propeller shaft and located between the fan motor and the impeller, wherein the porous ceramic carrier has a plurality of through holes each having a surface provided with an electro-thermal plating film layer. Thus, the air from the ambient environment is heated by the electro-thermal plating film layer quickly, thereby enhancing the heating efficiency of the fan apparatus.Type: ApplicationFiled: May 16, 2005Publication date: November 16, 2006Inventors: Wen-Long Chyn, Ching-Yi Lee
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Publication number: 20060199375Abstract: A structure applied to a photolithographic process is provided. The structure includes at least a film layer, an optical isolation layer, an anti-reflection coating and a photoresist layer sequentially formed over a substrate. In the photolithographic process, the optical isolation layer stops light from penetrating down to the film layer. Since the optical isolation layer is set up underneath the photoresist layer, light emitted from a light source during photo-exposure is prevented from reflecting from the substrate surface after passing through the film layer. Thus, the critical dimensions of the photolithographic process are unaffected by any change in the thickness of the film layer.Type: ApplicationFiled: January 19, 2006Publication date: September 7, 2006Inventors: Shun-Li Lin, Yun-Chu Lin, Wen-Chung Chang, Ching-Yi Lee
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Patent number: 7008870Abstract: A structure applied to a photolithographic process is provided. The structure comprises at least a film layer, an optical isolation layer, an anti-reflection coating and a photoresist layer sequentially formed over a substrate. In the photolithographic process, the optical isolation layer stops light from penetrating down to the film layer. Since the optical isolation layer is set up underneath the photoresist layer, light emitted from a light source during photo-exposure is prevented from reflecting from the substrate surface after passing through the film layer. Thus, the critical dimensions of the photolithographic process are unaffected by any change in the thickness of the film layer.Type: GrantFiled: December 26, 2003Date of Patent: March 7, 2006Assignee: MACRONIX International Co., Ltd.Inventors: Shun-Li Lin, Yun Chu Lin, Wen Chung Chang, Ching Yi Lee
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[STRUCTURE APPLIED TO A PHOTOLITHOGRAPHIC PROCESS AND METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE]
Publication number: 20050148166Abstract: A structure applied to a photolithographic process is provided. The structure comprises at least a film layer, an optical isolation layer, an anti-reflection coating and a photoresist layer sequentially formed over a substrate. In the photolithographic process, the optical isolation layer stops light from penetrating down to the film layer. Since the optical isolation layer is set up underneath the photoresist layer, light emitted from a light source during photo-exposure is prevented from reflecting from the substrate surface after passing through the film layer. Thus, the critical dimensions of the photolithographic process are unaffected by any change in the thickness of the film layer.Type: ApplicationFiled: December 26, 2003Publication date: July 7, 2005Inventors: SHUN-LI LIN, YUN CHU LIN, WEN CHUNG CHANG, CHING YI LEE -
Patent number: D1061549Type: GrantFiled: September 15, 2022Date of Patent: February 11, 2025Assignee: Acer IncorporatedInventors: Ching-Yuan Chuang, Chung-Hsien Lee, Cheng-Yi Chang
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Patent number: D1061550Type: GrantFiled: September 15, 2022Date of Patent: February 11, 2025Assignee: Acer IncorporatedInventors: Cheng-Yi Chang, Ming-Chun Wu, Ki-Wi Li, Chung-Hsien Lee, Shau-Tsung Hu, Ching-Yuan Chuang
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Patent number: D1061609Type: GrantFiled: September 15, 2022Date of Patent: February 11, 2025Assignee: Acer IncorporatedInventors: Cheng-Yi Chang, Ming-Chun Wu, Ki-Wi Li, Chung-Hsien Lee, Shau-Tsung Hu, Ching-Yuan Chuang
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Patent number: D1061616Type: GrantFiled: September 15, 2022Date of Patent: February 11, 2025Assignee: Acer IncorporatedInventors: Cheng-Yi Chang, Ming-Chun Wu, Ki-Wi Li, Chung-Hsien Lee, Shau-Tsung Hu, Ching-Yuan Chuang
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Patent number: D1062759Type: GrantFiled: September 15, 2022Date of Patent: February 18, 2025Assignee: Acer IncorporatedInventors: Ching-Yuan Chuang, Chung-Hsien Lee, Cheng-Yi Chang
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Patent number: D1062760Type: GrantFiled: September 15, 2022Date of Patent: February 18, 2025Assignee: Acer IncorporatedInventors: Cheng-Yi Chang, Ming-Chun Wu, Ki-Wi Li, Chung-Hsien Lee, Shau-Tsung Hu, Ching-Yuan Chuang
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Patent number: D1062761Type: GrantFiled: September 15, 2022Date of Patent: February 18, 2025Assignee: Acer IncorporatedInventors: Ching-Yuan Chuang, Chung-Hsien Lee, Cheng-Yi Chang