Patents by Inventor Ching-Yi Wu

Ching-Yi Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6395645
    Abstract: A method for anisotropic wet etching is disclosed. In to this invention, a photo mask for the etching mask suited in the anisotropic wet etching is provided. In the photo mask, a pattern with a series of adjacent corners having a substantially rectangular, angle is formed. At the corner areas compensational patterns comprising masked grids are prepared. The pattern on the photo mask is then transferred to an etching mask of a semiconductor substrate such that a multi-level terrace structure with fine corners may be prepared during the etching of the substrate. The method of this invention is also applicable to semiconductor materials with the same diamond structure as that of silicon.
    Type: Grant
    Filed: August 6, 1998
    Date of Patent: May 28, 2002
    Assignee: Industrial Technology Research Institute
    Inventors: Chen-Kuei Chung, Chien-Chih Lee, Ching-Yi Wu
  • Patent number: 6289746
    Abstract: A thermal pulsed micro flow sensor includes thermal sensors positioned in a fluid channel at downstream positions relative to a heater. Flow rate is measured by determining the time that it takes a thermal pulse to pass between two of the sensors. Since the resolution of the measurement increases with increasing distance between sensors while the accuracy of the measurement decreases, there is a conflict between the requirements of accuracy and short response time, as well as between accuracy and resolution. By providing at least three sensors and by varying the distances between the sensors, however, it is possible to select a pair of sensors having the highest resolution required by the application in which the sensor is used, while still ensuring that the velocity measurement is within the range of velocities accurately measurable by the selected sensors.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: September 18, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Chung Fu, Cheng-Kuo Lee, Ching-Yi Wu
  • Patent number: 6285503
    Abstract: Method for the preparation of holographic diffusers where the holographic diffuser is designed through iterative calculations according to the Fraunhofer theory of diffraction and some constrain conditions. In the iterative calculation some constrain conditions that can change the magnitude of the light passing through the diffuser are used to design the diffuser. A novel iterative calculation is disclosed such that uniformed mixing of colors and high light utilization efficiency of the diffuser may be provided.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: September 4, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Chung Chao, Chung-Jung Kuo, Ching-Yi Wu
  • Patent number: 6269829
    Abstract: An adapter to convert a traditional gas meter into a computerized gas meter is disclosed. The adapter of this invention comprises a microcomputer gas flow signal converting module, a gas flow monitoring module, a gas pressure monitoring module, an earthquake sensing module and a gas supply shutoff mechanism, and a casing to enclose the modules and to affixed to said traditional gas meter. The microcomputer gas flow rate signal converting module senses the movement of diaphragm of the traditional gas meter and converts the gas flow rate into computerized signals. The gas flow monitoring module and the gas pressure monitoring module monitor the gas flow rate and the gas pressure, and generate warning signals when abnormal phenomena are sensed. The earthquake sensing module senses strong earthquakes according to vertical vibration waves and horizontal vibration waves of said earthquake.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: August 7, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-An Chen, Tzong-Sheng Lee, Ching-Yi Wu
  • Patent number: 6265979
    Abstract: A novel earthquake sensing device is disclosed. The earthquake sensing device comprises a vertical vibrating wave sensing module, a horizontal wave sensing module and a determination module to determine the existence of an earthquake, based on, in combination, the vertical waves and the horizontal waves of an earthquake. In determining the existence of an earthquake, both the vertical waves and the horizontal waves of the earthquake are taken for consideration. Errors in the determination of earthquakes may thus be avoided.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: July 24, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-An Chen, Tzong-Sheng Lee, Ching-Yi Wu
  • Patent number: 6206022
    Abstract: A flow controller module comprising at least one micro flow sensor and a microvalve, integrated in a micro flow channel, is disclosed. The micro flow sensor comprises a pressure sensitive flow sensor. At the position of the micro flow sensor, the micro flow channel is provided with an orifice so that pressure of a flow may be enlarged to facilitate measurement of the flow speed. The microvalve comprises a silicon microbridge with a mesa structure and is driven by a voltage. The microvalve may operate under a normally closed mode or a normally open mode. Disclosed in this invention is also a flow sensor suited in the integrated flow controller module. Methods for preparing the flow sensor and the flow controller module are also disclosed.
    Type: Grant
    Filed: January 11, 2000
    Date of Patent: March 27, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Jye Tsai, Yue-Min Wan, Chun-Hsu Ke, Ruei-Hung Jang, Ching-Yi Wu, Raey-Shing Huang, Cheng-Jien Peng
  • Patent number: 6168905
    Abstract: An etching method for a semiconductor substrate to form a multi-level terraced structures is disclosed. A photomask is used to prepare a etching mask on a semiconductor substrate for a multi-level terraced structure. Said photomask has a pattern with a plurality of regions. Widths of the masked areas of the pattern are so designed that the etching rate of the etchant to respective parts of the substrate may be controlled, whereby a multi-level terraced structure with decided widths and heights of all levels may be prepared with one single photomask under one single etching step. This invention also discloses the photomask used in the etching method and products prepared according to the etching method.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: January 2, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Chen-Kuei Chung, Chien-Chih Lee, Ching-Yi Wu
  • Patent number: 6100107
    Abstract: A preparation method for an integrated assembly of a microchannel and an element is disclosed. In the preparation method of this invention, an element is prepared between a substrate and a sacrificial layer. Two protection layers, which are resistant to etchant for said substrate and said sacrificial layer, are prepared to isolate said element from its ambient environment. Said sacrificial layer defines an area to be etched off such that a microchannel may be formed. A coating layer with etching windows is then prepared on said sacrificial layer and the assembly is etched in an etchant to etch off said sacrificial layer and an area of said substrate beneath said sacrificial layer. An integrated assembly of a closed microchannel and an element is then accomplished. In the invented method, no bonding process is necessary and the integrated assembly so prepared has a planarization surface. This invention also disclosed a microchannel-element assembly prepared under the method of this invention.
    Type: Grant
    Filed: August 6, 1998
    Date of Patent: August 8, 2000
    Assignee: Industrial Technology Research Institute
    Inventors: Kuo-Lung Lei, Ten-Hsing Jaw, Chen-Kuei Chung, Dong-Sing Wuu, Ching-Yi Wu
  • Patent number: 6070851
    Abstract: A thermally buckling linear micro structure, in which by isolating technology a thermal oxidization isolation layer are generated on the two ends of a micro structure, or a material with larger thermal inflation coefficient is deposited, or the area of thermal conduction is reduced so that the two ends of a micro structure has a larger thermal stress and the membrane structure may be heated uniformly so to cause a thermally buckling deformation, therefore, the deformation of the membrane type micro structure is amplified linearly with the input power. This micro structure is formed as a membrane type by a membrane manufacturing technology.
    Type: Grant
    Filed: June 8, 1998
    Date of Patent: June 6, 2000
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Jye Tsai, Ruey-Shing Huang, Ching-Yi Wu
  • Patent number: 6032689
    Abstract: A flow controller module comprising at least one micro flow sensor and a microvalve, integrated in a micro flow channel, is disclosed. The micro flow sensor comprises a pressure sensitive flow sensor. At the position of the micro flow sensor, the micro flow channel is provided with an orifice so that pressure of a flow may be enlarged to facilitate measurement of the flow speed. The microvalve comprises a silicon microbridge with a mesa structure and is driven by a voltage. The microvalve may operate under a normally closed mode or a normally open mode. Disclosed in this invention is also a flow sensor suited in the integrated flow controller module. Methods for preparing the flow sensor and the flow controller module are also disclosed.
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: March 7, 2000
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Jye Tsai, Yue-Min Wan, Chun-Hsu Ke, Ruei-Hung Jang, Ching-Yi Wu, Raey-Shing Huang, Cheng-Jien Peng
  • Patent number: 5972193
    Abstract: The present invention uses a glass to act as a substrate. A stencil layer is patterned on the top surface of the substrate. Successively, a copper layer is deposited over the substrate. Next step is to remove the stencil layer. A negative photoresist layer is formed on the copper layer. A negative photoresist layer is processed using a backside exposure of the resist through the transparent substrate. The backside exposure technique uses the self-aligning, conductive copper layer as a mask. A plurality of trenches are then created in the photoresist layer and a second copper layer is electroplated in the trenches to form the planar coils.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: October 26, 1999
    Assignee: Industrial Technology Research Institute
    Inventors: Min-Chieh Chou, Ching-Yi Wu, Star Rey-Shing Huang, Yuh-Sheng Lin
  • Patent number: 5965813
    Abstract: A flow sensor comprises a heater module, a fluid temperature sensor and a Wheatstone bridge module. In the heater module, a heater is disposed very close to a heater temperature sensor and an insulation layer electrically isolates these two elements. The heater and the heater temperature sensor are disposed together on a floating membrane positioned normally to the fluid flow. The Wheatstone bridge module regulates electric current supplied to the heater, based on a constant temperature difference between the heater and the fluid, and provides voltage information of the electric current. A microprocessor converts the voltage information into velocity of fluid to be measured. A bypass channel is designed to adjust flow impedance of the fluid. Further disclosed is a fluid temperature sensor with the same design of the heater module whereby the factor of flow direction of the fluid may be ignored.
    Type: Grant
    Filed: July 23, 1998
    Date of Patent: October 12, 1999
    Assignee: Industry Technology Research Institute
    Inventors: Yue-Min Wan, Ching-Yi Wu
  • Patent number: 5789816
    Abstract: A multiple-chip IC package used to contain a number of chips therein is provided. The multiple-chip IC package includes a leadframe, at least one IC chip mounted on the leadframe, and at least one dummy chip mounted on a second area on the leadframe. On the dummy chip, there is provided with a plurality of bonding pads which serve as intermediate bonding pads between the chips and the pins on the leadframe so that any two connecting points are connected by a number of straight wires via the dummy chip. This allows the wire bonding process to be much easier to conduct. Further, the method for assembling this multiple-chip IC package includes a first step of mounting the chips on a leadframe; a second step of mounting at least one dummy chip having a plurality of bonding pads thereon on a selected area on the leadframe; and a third step of conducting a wire bonding process to interconnect between the chips and the pins.
    Type: Grant
    Filed: November 15, 1996
    Date of Patent: August 4, 1998
    Assignee: United Microelectronics Corporation
    Inventor: Ching-Yi Wu
  • Patent number: 5473710
    Abstract: The present invention discloses an OIC fabrication system which includes a tapered angle computing means for computing a tapered angle for aching a required coupling efficiency. The fabrication system also includes a fabrication control means which includes a tabulated fabricating parameter database for determining and controlling a plurality of fabricating parameters. The fabrication system also includes an etching system which receives a plurality of control signals from the fabrication controlling means to carry out the etching process to form a tapered etching angle such that the optical coupling efficiency can be achieved.
    Type: Grant
    Filed: October 8, 1993
    Date of Patent: December 5, 1995
    Assignee: Industrial Technology Research Institute
    Inventors: Ten-Hsing Jaw, Chao-Fu Hong, Ching-Yi Wu