Abstract: A method of manufacturing a package structure at least includes the following steps. An encapsulant laterally is formed to encapsulate the die and the plurality of through vias. A plurality of first connectors are formed to electrically connect to first surfaces of the plurality of through vias. A warpage control material is formed over the die, wherein the warpage control material is disposed to cover an entire surface of the die. A protection material is formed over the encapsulant and around the plurality of first connectors and the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a semiconductor fin disposed over a substrate, wherein the semiconductor fin includes a channel region and a source/drain region; a gate structure disposed over the channel region of the semiconductor fin, wherein the gate structure includes a gate spacer and a gate stack; a source/drain structure disposed over the source/drain region of the semiconductor fin; and a fin top hard mask vertically interposed between the gate spacer and the semiconductor fin, wherein the fin top hard mask includes a dielectric layer, and wherein a sidewall of the fin top hard mask directly contacts the gate stack, and another sidewall of the fin top hard mask directly contacts the source/drain structure.

Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.

Abstract: A package structure includes a die, an encapsulant laterally encapsulating the die, a warpage control material disposed over the die, and a protection material disposed over the encapsulant and around the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.

Abstract: A method of manufacturing a bump structure includes forming a passivation layer over a substrate. A metal pad structure is formed over the substrate, wherein the passivation layer surrounds the metal pad structure. A polyimide layer including a polyimide is formed over the passivation layer and the metal pad structure. A metal bump is formed over the metal pad structure and the polyimide layer. The polyimide is a reaction product of a dianhydride and a diamine, wherein at least one of the dianhydride and the diamine comprises one selected from the group consisting of a cycloalkane, a fused ring, a bicycloalkane, a tricycloalkane, a bicycloalkene, a tricycloalkene, a spiroalkane, and a heterocyclic ring.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a semiconductor fin disposed over a substrate, wherein the semiconductor fin includes a channel region and a source/drain region; a gate structure disposed over the channel region of the semiconductor fin, wherein the gate structure includes a gate spacer and a gate stack; a source/drain structure disposed over the source/drain region of the semiconductor fin; and a fin top hard mask vertically interposed between the gate spacer and the semiconductor fin, wherein the fin top hard mask includes a dielectric layer, and wherein a sidewall of the fin top hard mask directly contacts the gate stack, and another sidewall of the fin top hard mask directly contacts the source/drain structure.

Abstract: The present disclosure provides a method of forming a semiconductor device including an nFET structure and a pFET structure where each of the nFET and pFET structures include a semiconductor substrate and a gate trench. The method includes depositing an interfacial layer in each gate trench, depositing a first ferroelectric layer over the interfacial layer, removing the first ferroelectric layer from the nFET structure, depositing a metal oxide layer in each gate trench, depositing a second ferroelectric layer over the metal oxide layer, removing the second ferroelectric layer from the pFET structure, and depositing a gate electrode in each gate trench.

Abstract: A computer-aided diagnosis (CAD) system for classification and visualisation of a 3D medical image comprises a classification component comprising a 2D convolutional neural network (CNN) that is configured to generate a prediction of one or more classes for 2D slices of the 3D medical image. The system also comprises a visualisation component that is configured to: determine, for a target class of said one or more classes, which slices belong to the target class; for each identified slice, determine, by back-propagation to an intermediate layer of the CNN, a contribution of each pixel of the identified slice to classification of the identified slice as belonging to the target class; and generate a heatmap that provides a visual indication of the contributions of respective pixels.

Abstract: A display device includes a first light-emitting unit, a first driving unit, a second driving unit, a first circuit balance unit, and a second circuit balance unit. The first light-emitting unit includes a first lighting region and a second lighting region. The first driving unit is electrically connected to the first lighting region, and the second driving unit is electrically connected to the second lighting region. The first current balance unit is electrically connected to the first lighting region, and the second current balance unit is electrically connected to the second lighting region.

Abstract: A method is proposed for automatically locating the optic disc or the optic cup in an image of the rear of an eye. A portion of the image containing the optic disc or optic cup is divided into sub-regions using a clustering algorithm. Biologically inspired features, and optionally other features, are obtained for each of the sub-regions. An adaptive model uses the features to generate data indicative of whether each sub-region is within or outside the optic disc or optic cup. The result is then smoothed, to form an estimate of the position of the optic disc or optic cup.

Abstract: A backlight module is provided, and includes: a plurality of LED strings, each of which is formed from a plurality of LEDs connected in series and has an LED string current flowing through it, and a dimming controller which controls the duty cycle of a voltage pulse wave supplied to each of the LED strings, wherein the LED string current of each of the LED strings multiplied by the duty cycle of the voltage pulse wave for the same LED string equals a value, and the error between the values of the LED strings is within 6% of any of the values.

Abstract: A method is proposed for automatically locating the optic disc or the optic cup in an image of the rear of an eye. A portion of the image containing the optic disc or optic cup is divided into sub-regions using a clustering algorithm. Biologically inspired features, and optionally other features, are obtained for each of the sub-regions. An adaptive model uses the features to generate data indicative of whether each sub-region is within or outside the optic disc or optic cup. The result is then smoothed, to form an estimate of the position of the optic disc or optic cup.

Abstract: A method for updating or recovering a BIOS setting. The procedure for updating BIOS recovery and upgrade are accomplished by a BIOS update program along with a data file. By executing the BIOS update program, hardware information comprised in the data file is decompressed to obtain the flash memory format, and a BIOS image file comprised in the data file is then written to the flash memory accordingly.