Patents by Inventor Ching-Yu Chin

Ching-Yu Chin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Efficient analog layout prototyping by layout reuse with routing preservation
    Patent number: 10409943
    Abstract: A computer implemented method for routing preservation is presented. The method includes decomposing, using the computer, a geometric relationship between a first module, a second module, and a routing path of a source layout, when the computer is invoked to route the solution path. The method further includes disposing, using the computer, the routing path in a solution layout in accordance with the geometric relationship. The solution layout is not defined by a scaling of the source layout.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: September 10, 2019
    Assignee: SYNOPSYS, INC.
    Inventors: Tung-Chieh Chen, Po-Cheng Pan, Ching-Yu Chin, Hung-Ming Chen
  • EFFICIENT ANALOG LAYOUT PROTOTYPING BY LAYOUT REUSE WITH ROUTING PRESERVATION
    Publication number: 20150067632
    Abstract: A computer implemented method for routing preservation is presented. The method includes decomposing, using the computer, a geometric relationship between a first module, a second module, and a routing path of a source layout, when the computer is invoked to route the solution path. The method further includes disposing, using the computer, the routing path in a solution layout in accordance with the geometric relationship. The solution layout is not defined by a scaling of the source layout.
    Type: Application
    Filed: September 2, 2014
    Publication date: March 5, 2015
    Inventors: Tung-Chieh CHEN, Po-Cheng Pan, Ching-Yu Chin, Hung-Ming Chen