Patents by Inventor Ching-Yu Ko

Ching-Yu Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • CHIPLET BASED COMPUTATIONAL ACCELERATORS AND CONFIGURATION METHODS
    Publication number: 20260030425
    Abstract: A processing unit can include a plurality of chiplets coupled in a cascade topology by a plurality of interfaces. A set of the plurality of cascade coupled chiplets can be configured to execute a plurality of layers or blocks of layers of a computational model. The set of cascade coupled chiplets can also be configured with parameter data of corresponding ones of the plurality of layers or blocks of layers of the computational model.
    Type: Application
    Filed: October 2, 2025
    Publication date: January 29, 2026
    Inventors: Ching-Yu KO, Chester LIU, Mohammed ZIDAN, Jacob BOTIMER, Timothy WESLEY, Zhengya ZHANG, Wei LU
  • Chiplet based artificial intelligence accelerators and configuration methods
    Patent number: 12455995
    Abstract: A processing unit can include a plurality of chiplets coupled in a cascade topology by a plurality of interfaces. A set of the plurality of cascade coupled chiplets can be configured to execute a plurality of layers or blocks of layers of an artificial intelligence model. The set of cascade coupled chiplets can also be configured with parameter data of corresponding ones of the plurality of layers or blocks of layers of the artificial intelligence model.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: October 28, 2025
    Assignee: MemryX Incorporated
    Inventors: Ching-Yu Ko, Chester Liu, Mohammed Zidan, Jacob Botimer, Timothy Wesley, Zhengya Zhang, Wei Lu
  • CHIPLET BASED ARTIFICIAL INTELLIGENCE ACCELERATORS AND CONFIGURATION METHODS
    Publication number: 20220188492
    Abstract: A processing unit can include a plurality of chiplets coupled in a cascade topology by a plurality of interfaces. A set of the plurality of cascade coupled chiplets can be configured to execute a plurality of layers or blocks of layers of an artificial intelligence model. The set of cascade coupled chiplets can also be configured with parameter data of corresponding ones of the plurality of layers or blocks of layers of the artificial intelligence model.
    Type: Application
    Filed: December 10, 2020
    Publication date: June 16, 2022
    Inventors: Ching-Yu KO, Chester LIU, Mohammed ZIDAN, Jacob BOTIMER, Timothy WESLEY, Zhengya ZHANG, Wei LU
  • Image procession method and device
    Publication number: 20070065020
    Abstract: An image compression/decompression method is provided for compressing/decompressing image data. First, each pixel of the raw image data is received. Then, each pixel of the raw image data is compared with a default transparent code to recognize whether the pixel in the raw image data is a transparent code pixel. Finally, a single transparent code pixel or one transparent code pixel of a sequence of transparent code pixels is stored, and a total length information of the single transparent code pixel or the sequence of the transparent code pixels is acquired.
    Type: Application
    Filed: June 29, 2006
    Publication date: March 22, 2007
    Inventor: Ching-Yu Ko