Patents by Inventor Ching-Yu Lo

Ching-Yu Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8836127
    Abstract: An integrated circuit device has a dual damascene structure including a lower via portion and an upper line portion. The lower via portion is formed in a polyimide layer, and the upper line portion is formed in an inter-metal dielectric (IMD) layer formed of USG or polyimide. A passivation layer is formed on the IMD layer, and a bond pad is formed overlying the passivation layer to electrically connect the upper line portion.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: September 16, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ching-Yu Lo, Bo-Jiun Lin, Hai-Ching Chen, Tien-I Bao, Shau-Lin Shue, Chen-Hua Yu
  • Patent number: 8736014
    Abstract: A semiconductor device and method for making such that provides improved mechanical strength is disclosed. The semiconductor device comprises a semiconductor substrate; an adhesion layer disposed over the semiconductor substrate; and a porous low-k film disposed over the semiconductor substrate, wherein the porous low-k film comprises a porogen and a composite bonding structure including at least one Si—O—Si bonding group and at least one bridging organic functional group.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: May 27, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bo-Jiun Lin, Ching-Yu Lo, Hai-Ching Chen, Tien-I Bao, Chen-Hua Yu
  • Patent number: 8629066
    Abstract: An integrated circuit structure includes a semiconductor substrate; a through-semiconductor via (TSV) opening extending into the semiconductor substrate; and a TSV liner in the TSV opening. The TSV liner includes a sidewall portion on a sidewall of the TSV opening and a bottom portion at a bottom of the TSV opening. The bottom portion of the TSV liner has a bottom height greater than a middle thickness of the sidewall portion of the TSV liner.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: January 14, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Lo, Hung-Jung Tu, Hai-Ching Chen, Tien-I Bao, Wen-Chih Chiou, Chen-Hua Yu
  • Patent number: 8405192
    Abstract: The present disclosure provides a dielectric material including a low dielectric constant material and an additive. The additive includes a compound having a Si—X—Si bridge, where X is a number of carbon atoms between 1 and 8. The additive may include terminal Si—CH3 groups. The dielectric material including the additive may be used as an inter-layer dielectric (ILD) layer of a semiconductor device. The dielectric material including the additive may be formed using a CVD or sol-gel process. One example of the additive is bis(triethoxysilyl)ethene.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: March 26, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Yen Huang, Ching-Yu Lo, Hai-Ching Chen, Tien-I Bao
  • Publication number: 20120289062
    Abstract: An integrated circuit structure includes a semiconductor substrate; a through-semiconductor via (TSV) opening extending into the semiconductor substrate; and a TSV liner in the TSV opening. The TSV liner includes a sidewall portion on a sidewall of the TSV opening and a bottom portion at a bottom of the TSV opening. The bottom portion of the TSV liner has a bottom height greater than a middle thickness of the sidewall portion of the TSV liner.
    Type: Application
    Filed: July 30, 2012
    Publication date: November 15, 2012
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Lo, Hung-Jung Tu, Hai-Ching Chen, Tien-I Bao, Wen-Chih Chiou, Chen-Hua Yu
  • Patent number: 8264066
    Abstract: An integrated circuit structure includes a semiconductor substrate; a through-semiconductor via (TSV) opening extending into the semiconductor substrate; and a TSV liner in the TSV opening. The TSV liner includes a sidewall portion on a sidewall of the TSV opening and a bottom portion at a bottom of the TSV opening. The bottom portion of the TSV liner has a bottom height greater than a middle thickness of the sidewall portion of the TSV liner.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: September 11, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Lo, Hung-Jung Tu, Hai-Ching Chen, Tien-I Bao, Wen-Chih Chiou, Chen-Hua Yu
  • Publication number: 20120074535
    Abstract: The present disclosure provides a dielectric material including a low dielectric constant material and an additive. The additive includes a compound having a Si—X—Si bridge, where X is a number of carbon atoms between 1 and 8. The additive may include terminal Si—CH3 groups. The dielectric material including the additive may be used as an inter-layer dielectric (ILD) layer of a semiconductor device. The dielectric material including the additive may be formed using a CVD or sol-gel process. One example of the additive is bis(triethoxysilyl)ethene.
    Type: Application
    Filed: September 29, 2010
    Publication date: March 29, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., ("TSMC")
    Inventors: Hsin-Yen Huang, Ching-Yu Lo, Hai-Ching Chen, Tien-I Bao
  • Publication number: 20110115088
    Abstract: An integrated circuit device has a dual damascene structure including a lower via portion and an upper line portion. The lower via portion is formed in a polyimide layer, and the upper line portion is formed in an inter-metal dielectric (IMD) layer formed of USG or polyimide. A passivation layer is formed on the IMD layer, and a bond pad is formed overlying the passivation layer to electrically connect the upper line portion.
    Type: Application
    Filed: November 19, 2009
    Publication date: May 19, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ching-Yu Lo, Bo-Jiun Lin, Hai-Ching Chen, Tien-I Bao, Shau-Lin Shue, Chen-Hua Yu
  • Publication number: 20110006428
    Abstract: An integrated circuit structure includes a semiconductor substrate; a through-semiconductor via (TSV) opening extending into the semiconductor substrate; and a TSV liner in the TSV opening. The TSV liner includes a sidewall portion on a sidewall of the TSV opening and a bottom portion at a bottom of the TSV opening. The bottom portion of the TSV liner has a bottom height greater than a middle thickness of the sidewall portion of the TSV liner.
    Type: Application
    Filed: November 13, 2009
    Publication date: January 13, 2011
    Inventors: Ching-Yu Lo, Hung-Jung Tu, Hai-Ching Chen, Tien-I Bao, Wen-Chih Chiou, Chen-Hua Yu
  • Patent number: 7761192
    Abstract: A complex signal processing system for multiple fans is used to control the rotation of a first fan and a second fan. The speed signals of the first fan and the second fan are processed through an XOR operation to obtain a complex speed signal. In response to the complex speed signal, the speed and the operational status of the first fan and the second fan can be evaluated.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: July 20, 2010
    Assignee: Tyan Computer Corp.
    Inventor: Ching-Yu Lo
  • Publication number: 20100123224
    Abstract: A semiconductor device and method for making such that provides improved mechanical strength is disclosed. The semiconductor device comprises a semiconductor substrate; an adhesion layer disposed over the semiconductor substrate; and a porous low-k film disposed over the semiconductor substrate, wherein the porous low-k film comprises a porogen and a composite bonding structure including at least one Si—O—Si bonding group and at least one bridging organic functional group.
    Type: Application
    Filed: November 14, 2008
    Publication date: May 20, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Bo-Jiun Lin, Ching-Yu Lo, Hai-Ching Chen, Tien-I Bao, Chen-Hua Yu
  • Publication number: 20080074065
    Abstract: A complex signal processing system for multiple fans is used to control the rotation of a first fan and a second fan. The speed signals of the first fan and the second fan are processed through an XOR operation to obtain a complex speed signal. In response to the complex speed signal, the speed and the operational status of the first fan and the second fan can be evaluated.
    Type: Application
    Filed: December 11, 2006
    Publication date: March 27, 2008
    Applicant: TYAN COMPUTER CORP.
    Inventor: Ching-Yu Lo