Patents by Inventor Ching-Yu Lo
Ching-Yu Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250088361Abstract: Examples described herein relate to an apparatus comprising: multiple processors and circuitry coupled to the multiple processors, wherein at least one of the multiple processors comprises multiple cores and wherein the circuitry is to provide the multiple processors with access to at least two firmware Trusted Platform Module (TPM) instances. At least two firmware TPM instances of the firmware TPM instances is to apply cryptography to store information for platform authentication and wherein the information for platform authentication comprises one or more of: user credentials, passwords, certificates, encryption keys, shared secrets, state information, or hash data.Type: ApplicationFiled: November 20, 2024Publication date: March 13, 2025Inventors: Samuel HUI, Jayant MANGALAMPALLI, Fulton LI, Ching Yu LO
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Publication number: 20240303343Abstract: Examples described herein relate to multiple processor sockets comprising processors connected thereto and first circuitry. The first circuitry is to: based on a first mode of operation: configure the multiple processor sockets to operate with a single memory address space and share interfaces and based on a second mode of operation: configure the interfaces accessible to the multiple processor sockets to provide isolated communications to processor sockets in different partitions and configure the multiple processor sockets to operate in independent memory address spaces.Type: ApplicationFiled: May 16, 2024Publication date: September 12, 2024Inventors: Yi ZENG, Russell J. WUNDERLICH, Janusz JURSKI, Lumin ZHANG, Kasper WSZOLEK, Jeanne GUILLORY, Ching Yu LO, Teresa C. HERRICK, Richard Marian THOMAIYAR
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Patent number: 8836127Abstract: An integrated circuit device has a dual damascene structure including a lower via portion and an upper line portion. The lower via portion is formed in a polyimide layer, and the upper line portion is formed in an inter-metal dielectric (IMD) layer formed of USG or polyimide. A passivation layer is formed on the IMD layer, and a bond pad is formed overlying the passivation layer to electrically connect the upper line portion.Type: GrantFiled: November 19, 2009Date of Patent: September 16, 2014Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ching-Yu Lo, Bo-Jiun Lin, Hai-Ching Chen, Tien-I Bao, Shau-Lin Shue, Chen-Hua Yu
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Patent number: 8736014Abstract: A semiconductor device and method for making such that provides improved mechanical strength is disclosed. The semiconductor device comprises a semiconductor substrate; an adhesion layer disposed over the semiconductor substrate; and a porous low-k film disposed over the semiconductor substrate, wherein the porous low-k film comprises a porogen and a composite bonding structure including at least one Si—O—Si bonding group and at least one bridging organic functional group.Type: GrantFiled: November 14, 2008Date of Patent: May 27, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Bo-Jiun Lin, Ching-Yu Lo, Hai-Ching Chen, Tien-I Bao, Chen-Hua Yu
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Patent number: 8629066Abstract: An integrated circuit structure includes a semiconductor substrate; a through-semiconductor via (TSV) opening extending into the semiconductor substrate; and a TSV liner in the TSV opening. The TSV liner includes a sidewall portion on a sidewall of the TSV opening and a bottom portion at a bottom of the TSV opening. The bottom portion of the TSV liner has a bottom height greater than a middle thickness of the sidewall portion of the TSV liner.Type: GrantFiled: July 30, 2012Date of Patent: January 14, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ching-Yu Lo, Hung-Jung Tu, Hai-Ching Chen, Tien-I Bao, Wen-Chih Chiou, Chen-Hua Yu
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Patent number: 8405192Abstract: The present disclosure provides a dielectric material including a low dielectric constant material and an additive. The additive includes a compound having a Si—X—Si bridge, where X is a number of carbon atoms between 1 and 8. The additive may include terminal Si—CH3 groups. The dielectric material including the additive may be used as an inter-layer dielectric (ILD) layer of a semiconductor device. The dielectric material including the additive may be formed using a CVD or sol-gel process. One example of the additive is bis(triethoxysilyl)ethene.Type: GrantFiled: September 29, 2010Date of Patent: March 26, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsin-Yen Huang, Ching-Yu Lo, Hai-Ching Chen, Tien-I Bao
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Publication number: 20120289062Abstract: An integrated circuit structure includes a semiconductor substrate; a through-semiconductor via (TSV) opening extending into the semiconductor substrate; and a TSV liner in the TSV opening. The TSV liner includes a sidewall portion on a sidewall of the TSV opening and a bottom portion at a bottom of the TSV opening. The bottom portion of the TSV liner has a bottom height greater than a middle thickness of the sidewall portion of the TSV liner.Type: ApplicationFiled: July 30, 2012Publication date: November 15, 2012Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ching-Yu Lo, Hung-Jung Tu, Hai-Ching Chen, Tien-I Bao, Wen-Chih Chiou, Chen-Hua Yu
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Patent number: 8264066Abstract: An integrated circuit structure includes a semiconductor substrate; a through-semiconductor via (TSV) opening extending into the semiconductor substrate; and a TSV liner in the TSV opening. The TSV liner includes a sidewall portion on a sidewall of the TSV opening and a bottom portion at a bottom of the TSV opening. The bottom portion of the TSV liner has a bottom height greater than a middle thickness of the sidewall portion of the TSV liner.Type: GrantFiled: November 13, 2009Date of Patent: September 11, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ching-Yu Lo, Hung-Jung Tu, Hai-Ching Chen, Tien-I Bao, Wen-Chih Chiou, Chen-Hua Yu
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Publication number: 20120074535Abstract: The present disclosure provides a dielectric material including a low dielectric constant material and an additive. The additive includes a compound having a Si—X—Si bridge, where X is a number of carbon atoms between 1 and 8. The additive may include terminal Si—CH3 groups. The dielectric material including the additive may be used as an inter-layer dielectric (ILD) layer of a semiconductor device. The dielectric material including the additive may be formed using a CVD or sol-gel process. One example of the additive is bis(triethoxysilyl)ethene.Type: ApplicationFiled: September 29, 2010Publication date: March 29, 2012Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., ("TSMC")Inventors: Hsin-Yen Huang, Ching-Yu Lo, Hai-Ching Chen, Tien-I Bao
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Publication number: 20110115088Abstract: An integrated circuit device has a dual damascene structure including a lower via portion and an upper line portion. The lower via portion is formed in a polyimide layer, and the upper line portion is formed in an inter-metal dielectric (IMD) layer formed of USG or polyimide. A passivation layer is formed on the IMD layer, and a bond pad is formed overlying the passivation layer to electrically connect the upper line portion.Type: ApplicationFiled: November 19, 2009Publication date: May 19, 2011Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ching-Yu Lo, Bo-Jiun Lin, Hai-Ching Chen, Tien-I Bao, Shau-Lin Shue, Chen-Hua Yu
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Publication number: 20110006428Abstract: An integrated circuit structure includes a semiconductor substrate; a through-semiconductor via (TSV) opening extending into the semiconductor substrate; and a TSV liner in the TSV opening. The TSV liner includes a sidewall portion on a sidewall of the TSV opening and a bottom portion at a bottom of the TSV opening. The bottom portion of the TSV liner has a bottom height greater than a middle thickness of the sidewall portion of the TSV liner.Type: ApplicationFiled: November 13, 2009Publication date: January 13, 2011Inventors: Ching-Yu Lo, Hung-Jung Tu, Hai-Ching Chen, Tien-I Bao, Wen-Chih Chiou, Chen-Hua Yu
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Patent number: 7761192Abstract: A complex signal processing system for multiple fans is used to control the rotation of a first fan and a second fan. The speed signals of the first fan and the second fan are processed through an XOR operation to obtain a complex speed signal. In response to the complex speed signal, the speed and the operational status of the first fan and the second fan can be evaluated.Type: GrantFiled: December 11, 2006Date of Patent: July 20, 2010Assignee: Tyan Computer Corp.Inventor: Ching-Yu Lo
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Publication number: 20100123224Abstract: A semiconductor device and method for making such that provides improved mechanical strength is disclosed. The semiconductor device comprises a semiconductor substrate; an adhesion layer disposed over the semiconductor substrate; and a porous low-k film disposed over the semiconductor substrate, wherein the porous low-k film comprises a porogen and a composite bonding structure including at least one Si—O—Si bonding group and at least one bridging organic functional group.Type: ApplicationFiled: November 14, 2008Publication date: May 20, 2010Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Bo-Jiun Lin, Ching-Yu Lo, Hai-Ching Chen, Tien-I Bao, Chen-Hua Yu
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Publication number: 20080074065Abstract: A complex signal processing system for multiple fans is used to control the rotation of a first fan and a second fan. The speed signals of the first fan and the second fan are processed through an XOR operation to obtain a complex speed signal. In response to the complex speed signal, the speed and the operational status of the first fan and the second fan can be evaluated.Type: ApplicationFiled: December 11, 2006Publication date: March 27, 2008Applicant: TYAN COMPUTER CORP.Inventor: Ching-Yu Lo