Abstract: The present invention provides a method for metal gate work function tuning before contact formation in a fin-shaped field effect transistor (FinFET), where in the method comprises the following steps. (S1) providing a substrate having a metal gate structure on a side of the substrate, (S2) forming a titanium nitride (TiN) layer on the side of the substrate, and (S3) performing a gate annealing to tune work function of the metal gate structure.

Abstract: A metal gate forming process includes the following steps. A first metal layer is formed on a substrate by at least a first step followed by a second step, wherein the processing power of the second step is higher than the processing power of the first step.

Abstract: A semiconductor process of forming metal gates with different threshold voltages includes the following steps. A substrate having a first area and a second area is provided. A dielectric layer and a first work function layer are sequentially formed on the substrate of the first area and the second area. A second work function layer is directly formed on the first work function layer of the first area. A third work function layer is directly formed on the first work function layer of the second area, where the third work function layer is different from the second work function layer. The present invention also provides a semiconductor structure formed by said semiconductor process.

Abstract: A metal gate structure is provided. The metal gate structure includes a semiconductor substrate, a gate dielectric layer, a multi-layered P-type work function layer and a conductive metal layer. The gate dielectric layer is disposed on the semiconductor substrate. The multi-layered P-type work function layer is disposed on the gate dielectric layer, and the multi-layered P-type work function layer includes at least a crystalline P-type work function layer and at least an amorphous P-type work function layer. Furthermore, the conductive metal layer is disposed on the multi-layered P-type work function layer.

Abstract: A layout structure of electrode lead wires for organic light-emitting diode (OLED) display is provided for saving materials, simplifying fabrication process, and reducing power consumption so as to lower down the required driving voltage. The display comprises a plurality of cathode and anode electrodes and a plurality of electrode lead wires connected to the cathode electrodes and the anode electrodes respectively. The cathode and the anode lead wires made of a multi-layer metallic material having high conductivity and low impedance are laid on the same side of the transparent substrate.

Abstract: A method for performing a synchronized order change in a manufacturing process is provided. An order is associated with an order number and a work in process (WIP) number, which identifies a physical lot corresponding to the order. The synchronized order change maintains a relationship between the order number and the WIP number while making the change. This avoids the need to scrap lots that are no longer associated with an order number and prevents holds from being placed on incorrect lots.

Abstract: A method for forming electrically conductive bumps on a semiconductor substrate, or a semiconductor wafer and devices formed by the method are disclosed. In the method, a wafer that has an active surface, a plurality of conductive elements formed on the active surface and a passivation layer insulating the plurality of conductive bumps from each other is first provided. A first metal layer is then sputter deposited on top of the plurality of conductive elements and the passivation layer, followed by stencil printing a plurality of bumps of an insulating material on top of each one of the plurality of conductive elements. The plurality of bumps may be heat treated to a temperature of at least 100° C. for a period of at least 10 minutes for stress relief. A second metal layer is then sputter deposited on top of the plurality of bumps and the first metal layer.

Abstract: A layout structure of electrode lead wires for organic light-emitting diode (OLED) display is provided for saving materials, simplifying fabrication process, and reducing power consumption so as to lower down the required driving voltage. The display comprises a plurality of cathode and anode electrodes and a plurality of electrode lead wires connected to the cathode electrodes and the anode electrodes respectively. The cathode and the anode lead wires made of a multi-layer metallic material having high conductivity and low impedance are laid on the same side of the transparent substrate.

Abstract: A structure of a display device comprises an organic luminescent diode display faceplate, a flexible PCB, a driving IC element, a conductive adhesive, and a passive element for driving the resistance capacitance of the circuit. The organic luminescent diode display faceplate is mounted with the faceplate electrodes (anode and cathode). The flexible PCB is mounted on the center rear end of the organic luminescent diode display faceplate. The outside of the flexible PCB is mounted with a plurality of outer lead bonding; and the inside of the flexible PCB is mounted with a plurality of inner lead bonding.