Abstract: A method manufacturing of a semiconductor structure including following steps is provided. A material layer is provided. A first mask layer is formed on the material layer. Core patterns are formed on the first mask layer. A spacer material layer is conformally formed on the core patterns. An etch-back process is performed on the spacer material layer. A portion of the spacer material layer located on two ends of the core pattern is removed, then spacer structures are formed. Each spacer structure includes a merged spacer and a non-merged spacer. The core patterns are removed. The first patterned mask layer is formed to cover a portion of the merged spacer and expose another portion of the merged spacer and the non-merged spacer. The first patterned mask layer and the spacer structure are used as a mask, and the first mask layer is patterned into a second patterned mask layer.

Abstract: A method for evaluating a risk of a subject getting a specific disease includes steps of: storing a reference database that contains original parameter sets; selecting target alleles from an SNP profile derived from genome sequencing data of a subject; selecting target parameter sets from among the original parameter sets; calculating, for each of the target parameter sets, a race factor based on a global risk allele frequency and a group-specific risk allele frequency included in the target parameter set; calculating a genetic factor based on statistics, global reference allele frequencies, the race factors for the target parameter sets, and numbers of chromosomes in homologous chromosome pairs included in the target parameter sets; calculating a citation factor based on numbers of citation times included in the target parameter sets; and calculating a risk score based on the genetic factor and the citation factor.

Abstract: A method manufacturing of a semiconductor structure including following steps is provided. A material layer is provided. A first mask layer is formed on the material layer. Core patterns are formed on the first mask layer. A spacer material layer is conformally formed on the core patterns. An etch-back process is performed on the spacer material layer. A portion of the spacer material layer located on two ends of the core pattern is removed, then spacer structures are formed. Each spacer structure includes a merged spacer and a non-merged spacer. The core patterns are removed. The first patterned mask layer is formed to cover a portion of the merged spacer and expose another portion of the merged spacer and the non-merged spacer. The first patterned mask layer and the spacer structure are used as a mask, and the first mask layer is patterned into a second patterned mask layer.

Abstract: A method for manufacturing a resistive random access memory structure is provided. The method includes providing a substrate, and the substrate includes an array region and a peripheral region. The method includes forming a first low-k dielectric layer in the peripheral region, and the first low-k dielectric layer has a dielectric constant of less than 3. The method includes forming a plurality of memory cells on the substrate and in the array region. The method includes forming a dummy memory cell at a boundary between the array region and the peripheral region. The method includes forming a gap-filling dielectric layer on the substrate. The method includes forming a plurality of first conductive plugs in the gap-filling dielectric layer, and each of the plurality of first conductive plugs is in contact with one of the plurality of memory cells.

Abstract: A resistive random access memory structure and its manufacturing method are provided. The resistive random access memory structure includes a substrate having an array region and a peripheral region. A first low-k dielectric layer located in the peripheral region has a dielectric constant of less than 3. Memory cells are located on the substrate and in the array region. A dielectric layer covers the memory cells and fills the space between adjacent memory cells in the array region, and its material layer is different from that of the first low-k dielectric layer. First conductive plugs are located in the dielectric layer and each of them is in contact with one of the memory cells. A dummy memory cell is located at the boundary between the array region and the peripheral region, and the dummy memory cell is not in contact with any one of the first conductive plugs.

Abstract: A semiconductor structure includes a trunk portion and a branch portion. The trunk portion extends in a first direction. The branch portion is connected to the trunk portion. The branch portion includes a handle portion and a two-pronged portion. The handle portion is connected to the trunk portion and extends in a second direction. The second direction intersects the first direction. The two-pronged portion is connected to the handle portion. A line width of the handle portion is greater than a line width of the two-pronged portion.

Abstract: A semiconductor structure includes a trunk portion and a branch portion. The trunk portion extends in a first direction. The branch portion is connected to the trunk portion. The branch portion includes a handle portion and a two-pronged portion. The handle portion is connected to the trunk portion and extends in a second direction. The second direction intersects the first direction. The two-pronged portion is connected to the handle portion. A line width of the handle portion is greater than a line width of the two-pronged portion.

Abstract: A method for forming a semiconductor structure includes: forming an active layer on a substrate; forming hard masks on the active layer, wherein a first spacing is disposed between two closely spaced hard masks in a predetermined word line region nearest to a predetermined selective gate region, wherein the first spacing is less than a second spacing between any two of the hard masks other than the two closely spaced hard masks; forming spacers on the sidewalls of the hard masks, wherein two spacers on opposite sides of the sidewalls of the closely spaced hard masks merge into a combined spacer; and transferring the patterns of the spacers to the active layer to form word lines. The step of transferring the patterns of the spacers includes transferring the pattern of the combined spacer to the active layer to form a first word line.

Abstract: A resistive random access memory structure and its manufacturing method are provided. The resistive random access memory structure includes a substrate having an array region and a peripheral region. A first low-k dielectric layer located in the peripheral region has a dielectric constant of less than 3. Memory cells are located on the substrate and in the array region. A dielectric layer covers the memory cells and fills the space between adjacent memory cells in the peripheral region, and its material layer is different from that of the first low-k dielectric layer. First conductive plugs are located in the dielectric layer and each of them is in contact with one of the memory cells. A dummy memory cell is located at the boundary between the array region and the peripheral region, and the dummy memory cell is not in contact with any one of the first conductive plugs.

Abstract: An auxiliary safety warning light system for a vehicle includes a light assembly having a first side lighting portion, a mediate lighting portion and a second side lighting portion and a control unit connecting the light assembly to the light-control system of the vehicle or independently to the steering panel of the vehicle. The light assembly can light and/or blink in different conditions so as to facilitate the identification of the state and intentions of the vehicle and decrease the likelihood of accidents to secure the driver's safety.

Abstract: The present invention relates to a brake signal sensor device which is electrically connected to a warning light by a transfer wire. The brake signal sensor device includes a body, and a cover mounted on the body. The body defines a receiving chamber for securing a contact switch whose one side is provided with two spaced guide plates. A pull wire is used to pull an elastic member to displace a conducting member, such that the contact switch can produce a start signal which is transferred to the warning light, whereby the warning light secured on the bicycle emits light, thereby enhancing the safety of riding the bicycle. The brake signal sensor device may be easily fixed on the brake cable adjacent to the brake lever by a fastening strap without having to be mounted on the brake pad.

Abstract: A multifunctional safety warning device for a vehicle includes a mediate light bar zone having a first side and a second side; a left indicating light mounted on the first side of the mediate light bar zone and being adapted to light independently; and a right indicating light mounted on the second side of the mediate light bar zone and being adapted to light independently. In such a manner, the mediate light bar zone, the left indicating light, and the right indicating light are connected to and controlled by a control unit, whereby, the control unit is used to alternatively operate the mediate light bar zone, the left indicating light, and the right indicating light of the safety warning device, and to operate a set of breakdown light of the vehicle so that at least one set of light is used indicate a steering direction of the vehicle.

Abstract: An auxiliary safety warning lamp system for a vehicle comprising a lamp unit, a remote control unit including a receiver attached to the lamp unit, and an emitter controlled by an operator and emitting signals to the receiver for controlling operation of the lamp unit, a control unit connected between the receiver and the lamp unit for identifying the signals emitted from the emitter to the receiver so as to control functions of the lamp unit, and a switch-type power adjustable supply unit connected to the control unit for supplying power to the lamp unit.