Abstract: A network communication apparatus is provided. The network communication apparatus includes a Wi-Fi unit, a sampling rate converter, an LTE unit, and a transceiver. The Wi-Fi unit has a plurality of Wi-Fi data, wherein the Wi-Fi data has a Wi-Fi sampling rate. The sampling rate converter processes the Wi-Fi data by converting the sampling rate. The LTE unit has a plurality of LTE data, wherein the LTE data has an LTE sampling rate. The transceiver generates a CPRI basic frame, wherein a first portion of the CPRI basic frame includes a portion of the LTE data and a second portion of the CPRI basic frame includes a portion of the Wi-Fi data.

Abstract: A time division duplex orthogonal frequency division multiplexing (TDD-OFDM) distributed antenna system (DAS), a base station and a remote access unit for the same are provided. The base station performs an inverse fast Fourier transform on a user downlink signal, a transmitting/receiving enable signal and an input control signal to generate a first OFDM signal. The user downlink signal is carried on a used subcarrier set of the first OFDM signal, while the transmitting/receiving enable signal and the input control signal are carried on a guard band subcarrier set of the first OFDM signal. The remote access unit receives the first OFDM signal via a fiber transmission line, switches between a transmitting mode and a receiving mode periodically, performs a clock synchronization with the base station according to the transmitting/receiving enable signal, and performs a system configuration according to the input control signal.

Abstract: A time division duplex orthogonal frequency division multiplexing (TDD-OFDM) distributed antenna system (DAS), a base station and a remote access unit for the same are provided. The base station performs an inverse fast Fourier transform on a user downlink signal, a transmitting/receiving enable signal and an input control signal to generate a first OFDM signal. The user downlink signal is carried on a used subcarrier set of the first OFDM signal, while the transmitting/receiving enable signal and the input control signal are carried on a guard band subcarrier set of the first OFDM signal. The remote access unit receives the first OFDM signal via a fiber transmission line, switches between a transmitting mode and a receiving mode periodically, performs a clock synchronization with the base station according to the transmitting/receiving enable signal, and performs a system configuration according to the input control signal.

Abstract: A null detector and its corresponding method are provided. The null detector includes a power detector, a smoother, and an overlapper. The power detector outputs a power level signal according to the power level of a received signal. The smoother is coupled to the power detector for determining according to the power level signal whether the received signal is transmitting a null symbol, and then the smoother outputs a null detection signal at a first state value or a second state value indicating the result of the determination. The overlapper is coupled to the smoother for providing the duration and position of the null symbols transmitted by the received signal according to the null detection signal.

Abstract: A method for frequency offset estimation in frequency domain is provided. The method comprises the following steps. First, a phase angle of a signal field of the input signal after processed by Fast Fourier Transformation (FFT) and channel equalization is calculated. A frequency offset error originated from at least one frequency offset estimation process in time domain is then estimated according to the phase angle.

Abstract: A time domain symbol timing synchronization circuit is disclosed, which comprises: an autocorrelation function calculator for calculating cyclic prefix autocorrelation functions and an offset time estimator for searching peak positions of cyclic prefix autocorrelation functions to indicate symbol boundary of received communication symbols. The offset time estimator compares a current peak position and a previous peak position. If (a) the difference of the positions is larger than a threshold and (b) the current peak is smaller than a reference average peak, the current peak is determined as false; the offset time estimator weeds out and replaces the current peak position by the previous peak position; and the current peak is not introduced in the reference average peak calculation.

Abstract: A method for frequency offset estimation in frequency domain is provided. The method comprises the following steps. First, a phase angle of a signal field of the input signal after processed by Fast Fourier Transformation (FFT) and channel equalization is calculated. A frequency offset error originated from at least one frequency offset estimation process in time domain is then estimated according to the phase angle.

Abstract: A method for frequency offset estimation in frequency domain is provided. The method comprises the following steps. First, a phase angle of a signal field of the input signal after processed by Fast Fourier Transformation (FFT) and channel equalization is calculated. A frequency offset error originated from at least one frequency offset estimation process in time domain is then estimated according to the phase angle.

Abstract: A null detector and its corresponding method are provided. The null detector includes a power detector, a smoother, and an overlapper. The power detector outputs a power level signal according to the power level of a received signal. The smoother is coupled to the power detector for determining according to the power level signal whether the received signal is transmitting a null symbol, and then the smoother outputs a null detection signal at a first state value or a second state value indicating the result of the determination. The overlapper is coupled to the smoother for providing the duration and position of the null symbols transmitted by the received signal according to the null detection signal.

Abstract: A time domain symbol timing synchronization circuit is disclosed, which comprises: an autocorrelation function calculator for calculating cyclic prefix autocorrelation functions and an offset time estimator for searching peak positions of cyclic prefix autocorrelation functions to indicate symbol boundary of received communication symbols. The offset time estimator compares a current peak position and a previous peak position. If (a) the difference of the positions is larger than a threshold and (b) the current peak is smaller than a reference average peak, the current peak is determined as false; the offset time estimator weeds out and replaces the current peak position by the previous peak position; and the current peak is not introduced in the reference average peak calculation.

Abstract: The invention discloses a variable length FFT apparatus and a method thereof. The FFT apparatus includes a split-radix based FFT unit and a multiplexing unit. The split-radix based FFT unit has a plurality of processing elements cascaded in a series. The multiplexing unit is coupled to the split-radix based FFT unit, and is for selectively bypassing at least one of the processing elements according to the size of input data when the split-radix based FFT unit performs the FFT computation on the input data. The FFT apparatus of the present invention therefore has a simple structure and is flexible for any FFT size.

Abstract: A radio receiver has an ADC connected to an RF module. Baseband processing modules are connected to the ADC, and a power control module is connected to each of the baseband processing modules. Each of the baseband processing modules is capable of performing detection, demodulation, time and frequency synchronization, decoding, and de-scrambling of signals of a respective modulation format among numerous modulation formats. At least one of the baseband processing modules also has a rate converter connected to the ADC for converting a data rate of signals output from the ADC to a data rate of the corresponding modulation format of that baseband processing module. The power control module is connected to the baseband processing modules and controls power to the baseband processing modules according to signals received from the baseband processing modules.

Abstract: A method for updating coefficients in a decision feedback equalizer (DFE). The DFE comprises an ISI canceler for canceling inter-symbol interference (ISI) from a plurality of first signals received from a channel. A first symbol comprising a set of the first signals is decoded to generate a decoded symbol. Then, a vector of error values computed as the difference between the decoded symbol, and the first symbol is obtained. According to the decoded symbol and the vector of the error values, a temp matrix is generated. Next, the values of the elements in every diagonal line of the temp matrix are averaged. Finally, the coefficients are updated by the Toeplitz Matrix.

Abstract: A method for frequency offset estimation in frequency domain is provided. The method comprises the following steps. First, a phase angle of a signal field of the input signal after processed by Fast Fourier Transformation (FFT) and channel equalization is calculated. A frequency offset error originated from at least one frequency offset estimation process in time domain is then estimated according to the phase angle.

Abstract: An apparatus for estimating frequency offset of a demodulator is disclosed. An input symbol is regarded as a rotating phasor obtained by consecutive sampling symbols, while the phasor encompasses an argument containing phase rotated by frequency offset and phase difference by modulation polarity. An adaptive judgment circuit encompassing a decision feedback way is employed to de-polarize the phasor, i.e. to move out the argument of modulation. The adaptive judgment circuit includes a decision circuit and a multiplier. The decision circuit of the adaptive judgment circuit receives the phasor fed from the phase-increment extraction circuit to find a de-noise phasor by using the product of the phasor and a de-noise symbol, wherein the de-noise symbol is determined according to an inner product of the phasor and a last summation stored in a summation circuit.

Abstract: A method for updating coefficients in a decision feedback equalizer (DFE). The DFE comprises an ISI canceller for canceling ISI from a plurality of first signals received from a channel. A first symbol comprising a set of the first signals is decoded to generate a decoded symbol. Then, a vector of error values computed as the difference between the decoded symbol, and the first symbol is obtained. According to the decoded symbol and the vector of the error values, a temp matrix is generated. Next, the values of the elements in every diagonal line of the temp matrix are averaged. Finally, the coefficients are updated by the Toeplitz Matrix.

Abstract: A radio receiver has an ADC connected to an RF module. Baseband processing modules are connected to the ADC, and a power control module is connected to each of the baseband processing modules. Each of the baseband processing modules is capable of performing detection, demodulation, time and frequency synchronization, decoding, and de-scrambling of signals of a respective modulation format among numerous modulation formats. At least one of the baseband processing modules also has a rate converter connected to the ADC for converting a data rate of signals output from the ADC to a data rate of the corresponding modulation format of that baseband processing module. The power control module is connected to the baseband processing modules and controls power to the baseband processing modules according to signals received from the baseband processing modules.

Abstract: An apparatus for estimating frequency offset of a demodulator is disclosed. An input symbol is regarded as a rotating phasor obtained by consecutive sampling symbols, while the phasor encompasses an argument containing phase rotated by frequency offset and phase difference by modulation polarity. An adaptive judgment circuit encompassing a decision feedback way is employed to de-polarize the phasor, i.e. to move out the argument of modulation. The adaptive judgment circuit includes a decision circuit and a multiplier. The decision circuit of the adaptive judgment circuit receives the phasor fed from the phase-increment extraction circuit to find a de-noise phasor by using the product of the phasor and a de-noise symbol, wherein the de-noise symbol is determined according to an inner product of the phasor and a last summation stored in a summation circuit.

Abstract: A conversion system and method is disclosed for converting between digital and analog data signals. The conversion system comprises a signal input line for each digital data signal, a reconstructor-resampler unit for each digital data signal, a combiner, a modulator, a digital-to-analog converter, and a signal output line. Each signal line input couples to the respective reconstructor-resampler unit for the digital data signal. Each reconstructor-resampler unit then couples to a combiner which couples to a modulator. The modulator couples to the digital-to-analog converter that couples to the signal output line from which an analog output signal is produced. The reconstructor-resampler comprises a sampling member coupled to the signal line input and a polynomial interpolator member coupled to the sampling member and the modulator. Also, the modulator operates at a predetermined, or fixed, frequency regardless of the sampling frequency of the digital data signal.