Patents by Inventor Chinnugounder Senthilkumar
Chinnugounder Senthilkumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7554312Abstract: According to an embodiment of the invention, a method and apparatus for DC voltage conversion are described. According to one embodiment, a voltage converter comprises a current mirror, the current mirror being coupled with a power source; a first transistor device coupled with a bias generator to receive a bias voltage; a second transistor device coupled between the current mirror and the first transistor device; and an output transistor device, a gate of the output transistor device being coupled with a gate of the second transistor device and to the current mirror.Type: GrantFiled: June 30, 2003Date of Patent: June 30, 2009Assignee: Intel CorporationInventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
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Patent number: 7157894Abstract: Start-up circuit for current mirror circuits to facilitate transition from a zero-current state to an operation state. The start-up circuit includes two sets of current control devices. A set is coupled to each leg of the current mirrored circuit to provide a bias on start-up. The current control devices are coupled together to mirror the current that continues during the operational state such that the start-up circuit in combination with the operating circuit do not draw more current in the operational state than the operating circuit would normally draw in the operational state.Type: GrantFiled: December 30, 2002Date of Patent: January 2, 2007Assignee: Intel CorporationInventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
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Patent number: 7126798Abstract: According to one embodiment, an integrated circuit (IC) is disclosed. The IC includes a package, a die mounted within the package, circuit components mounted on the die, and a voltage regulator mounted on the die to supply power to the circuit components.Type: GrantFiled: July 12, 2004Date of Patent: October 24, 2006Assignee: Intel CorporationInventors: Michael D. Piorun, Andrew Volk, Chinnugounder Senthilkumar, Robert Fulton, David D. Donofrio, Steve S. Simoni
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Patent number: 7109810Abstract: Circuitry for controlling the oscillation frequency of an oscillator by using a digitally tunable on-chip capacitor bank. The capacitor bank includes a plurality of on-chip capacitors, each of which is independently selectable by a control signal for providing a selectable amount of capacitance to the oscillator to control the oscillator's oscillation frequency.Type: GrantFiled: October 27, 2003Date of Patent: September 19, 2006Assignee: Intel CorporationInventors: Chinnugounder Senthilkumar, Robert Fulton, Tea Lee
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Publication number: 20050231272Abstract: According to an embodiment of the invention, a method and apparatus for dynamic reference voltage adjustment are described. According to one embodiment, a reference circuit comprises a reference node to provide a reference voltage; a first transistor device to receive a first configuration signal at a gate terminal, a current to flow through the first transistor device when the first configuration signal is a first value; and a second transistor device to receive a first voltage potential at a gate terminal, the current to flow through the second transistor device and the reference voltage to be increased by the first voltage potential when the configuration signal is a second value.Type: ApplicationFiled: June 22, 2005Publication date: October 20, 2005Inventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
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Patent number: 6940163Abstract: According to one embodiment, an integrated circuit (IC) is disclosed. The IC includes a package, a die mounted within the package, circuit components mounted on the die, and a voltage regulator mounted on the die to supply power to the circuit components.Type: GrantFiled: December 31, 2002Date of Patent: September 6, 2005Assignee: Intel CorporationInventors: Michael D. Piorun, Andrew Volk, Chinnugounder Senthilkumar, Robert Fulton, David D. Donofrio, Steve S. Simoni
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Patent number: 6924692Abstract: According to an embodiment of the invention, a method and apparatus for dynamic reference voltage adjustment are described. According to one embodiment, a reference circuit comprises a reference node to provide a reference voltage; a first transistor device to receive a first configuration signal at a gate terminal, a current to flow through the first transistor device when the first configuration signal is a first value; and a second transistor device to receive a first voltage potential at a gate terminal, the current to flow through the second transistor device and the reference voltage to be increased by the first voltage potential when the configuration signal is a second value.Type: GrantFiled: June 30, 2003Date of Patent: August 2, 2005Assignee: Intel CorporationInventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
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Publication number: 20050003764Abstract: An apparatus, in some embodiments, includes a first circuit to monitor a current, a second circuit to produce a reference current, and a control circuit coupled to the first circuit and the second circuit. In operation, the control circuit processes a first signal received from the first circuit and a second signal received from the second circuit and provides a control signal to the circuit to control the current. A method, in some embodiments, includes generating a reference current, generating a first current in a circuit, generating a second current related to the first current, and reducing the first current when the second current is greater than the reference current.Type: ApplicationFiled: June 18, 2003Publication date: January 6, 2005Inventors: Michael Piorun, Chinnugounder Senthilkumar, Robert Fulton, Kirupa Pushparai, Andrew Volk
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Publication number: 20040268158Abstract: According to an embodiment of the invention, a method and apparatus for DC voltage conversion are described. According to one embodiment, a voltage converter comprises a current mirror, the current mirror being coupled with a power source; a first transistor device coupled with a bias generator to receive a bias voltage; a second transistor device coupled between the current mirror and the first transistor device; and an output transistor device, a gate of the output transistor device being coupled with a gate of the second transistor device and to the current mirror.Type: ApplicationFiled: June 30, 2003Publication date: December 30, 2004Inventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
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Publication number: 20040263240Abstract: According to an embodiment of the invention, a method and apparatus for dynamic reference voltage adjustment are described. According to one embodiment, a reference circuit comprises a reference node to provide a reference voltage; a first transistor device to receive a first configuration signal at a gate terminal, a current to flow through the first transistor device when the first configuration signal is a first value; and a second transistor device to receive a first voltage potential at a gate terminal, the current to flow through the second transistor device and the reference voltage to be increased by the first voltage potential when the configuration signal is a second value.Type: ApplicationFiled: June 30, 2003Publication date: December 30, 2004Applicant: Intel CorporationInventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
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Publication number: 20040240309Abstract: According to one embodiment, an integrated circuit (IC) is disclosed. The IC includes a package, a die mounted within the package, circuit components mounted on the die, and a voltage regulator mounted on the die to supply power to the circuit components.Type: ApplicationFiled: July 12, 2004Publication date: December 2, 2004Inventors: Michael D. Piorun, Andrew Volk, Chinnugounder Senthilkumar, Robert Fulton, David D. Donofrio, Steve S. Simoni
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Patent number: 6791428Abstract: A circuit for producing a reliable duty cycle for a low power oscillator. The circuit produces a square wave signal based on the differences between the oscillating output signal driven by a piezoelectric crystal and a phase shifted output signal. This circuit provides a quick start for a clock signal, generates a reliable fifty percent duty cycle and is better protected from common mode noise. This circuit can also be configured to be programmable to provide for an adjustable duty cycle.Type: GrantFiled: December 30, 2002Date of Patent: September 14, 2004Assignee: Intel CorporationInventors: Chinnugounder Senthilkumar, Tea Lee, Robert Fulton, Andrew Volk, Harishankar Sridharan
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Patent number: 6774735Abstract: A clock oscillator circuit that includes an inverting amplifier and a resonator configured to generate an oscillating signal. The clock oscillator includes a bias circuit having a relatively constant current source configured to create a bias voltage to bias the amplifier in an operating state that can sustain the oscillating signal. The inverting amplifier and the bias circuit are configured to operate in a low power state.Type: GrantFiled: January 17, 2002Date of Patent: August 10, 2004Assignee: Intel CorporationInventors: Chinnugounder Senthilkumar, Tea Lee, Robert Fulton, Andrew M. Volk
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Publication number: 20040124510Abstract: According to one embodiment, an integrated circuit (IC) is disclosed. The IC includes a package, a die mounted within the package, circuit components mounted on the die, and a voltage regulator mounted on the die to supply power to the circuit components.Type: ApplicationFiled: December 31, 2002Publication date: July 1, 2004Inventors: Michael D. Piorun, Andrew Volk, Chinnugounder Senthilkumar, Robert Fulton, David D. Donofrio, Steve S. Simoni
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Publication number: 20040124934Abstract: A circuit for producing a reliable duty cycle for a low power oscillator. The circuit produces a square wave signal based on the differences between the oscillating output signal driven by a piezoelectric crystal and a phase shifted output signal. This circuit provides a quick start for a clock signal, generates a reliable fifty percent duty cycle and is better protected from common mode noise. This circuit can also be configured to be programmable to provide for an adjustable duty cycle.Type: ApplicationFiled: December 30, 2002Publication date: July 1, 2004Inventors: Chinnugounder Senthilkumar, Tea Lee, Robert Fulton, Andrew Volk, Harishankar Sridharan
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Publication number: 20040124823Abstract: Start-up circuit for current mirror circuits to facilitate transition from a zero-current state to an operation state. The start-up circuit includes two sets of current control devices. A set is coupled to each leg of the current mirrored circuit to provide a bias on start-up. The current control devices are coupled together to mirror the current that continues during the operational state such that the start-up circuit in combination with the operating circuit do not draw more current in the operational state than the operating circuit would normally draw in the operational state.Type: ApplicationFiled: December 30, 2002Publication date: July 1, 2004Inventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar
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Publication number: 20040085142Abstract: Circuitry for controlling the oscillation frequency of an oscillator by using a digitally tunable on-chip capacitor bank. The capacitor bank includes a plurality of on-chip capacitors, each of which is independently selectable by a control signal for providing a selectable amount of capacitance to the oscillator to control the oscillator's oscillation frequency.Type: ApplicationFiled: October 27, 2003Publication date: May 6, 2004Applicant: Intel Corporation, a Delaware CorporationInventors: Chinnugounder Senthilkumar, Robert Fulton, Tea Lee
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Publication number: 20040085141Abstract: Circuitry for controlling the oscillation frequency of an oscillator by using a digitally tunable on-chip capacitor bank. The capacitor bank includes a plurality of on-chip capacitors, each of which is independently selectable by a control signal for providing a selectable amount of capacitance to the oscillator to control the oscillator's oscillation frequency.Type: ApplicationFiled: October 27, 2003Publication date: May 6, 2004Applicant: Intel Corporation, a Delaware CorporationInventors: Chinnugounder Senthilkumar, Robert Fulton, Tea Lee
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Patent number: 6657507Abstract: An oscillator circuit including an integrated circuit amplifier, an integrated circuit active resistance circuit to set the gain of the amplifier, a crystal resonator to set the frequency of the signal generated by the oscillator circuit, and a pair of capacitors respectively situated at the inputs and outputs of the amplifier to assist in the starting of the oscillation signal. The active resistance circuit is responsive to an input signal in order to set the gain of the amplifier slightly above unity gain in order to meet the criterion for oscillation, but not too much above unity gain where the oscillator would unduly consume too much power. Thus, the oscillator has inherent low power characteristics. The active resistance circuit allows the amplifier gain to be set by software or other electronic means.Type: GrantFiled: January 2, 2002Date of Patent: December 2, 2003Assignee: Intel CorporationInventors: Robert R. Fulton, Chinnugounder Senthilkumar, Tea Lee
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Publication number: 20030132809Abstract: Circuitry for controlling the oscillation frequency of an oscillator by using a digitally tunable on-chip capacitor bank. The capacitor bank includes a plurality of on-chip capacitors, each of which is independently selectable by a control signal for providing a selectable amount of capacitance to the oscillator to control the oscillator's oscillation frequency.Type: ApplicationFiled: January 17, 2002Publication date: July 17, 2003Inventors: Chinnugounder Senthilkumar, Robert Fulton, Tea Lee