Patents by Inventor Chintan Hemendrakumar Shah

Chintan Hemendrakumar Shah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dynamic voltage level shifters employing pulse generation circuits, and related systems and methods
    Patent number: 9608637
    Abstract: Dynamic voltage level shifters employing pulse generation circuits are disclosed. In one aspect, a dynamic voltage level shifter includes a dynamic voltage level shifting circuit. The dynamic voltage level shifting circuit includes a pre-charge circuit configured to provide supply voltage of a first voltage domain to a dynamic node in response to a clock signal having pre-charge voltage. An evaluate circuit is configured to provide ground voltage to the dynamic node in response to an input signal having an active voltage while the clock signal has evaluate voltage. A keeper circuit is configured to provide a reduced drive strength to the dynamic node in response to pulse signal. The pulse signal is generated by a pulse generation circuit, wherein a pulse width of the pulse signal correlates to a difference in supply voltages of first and second voltage domains.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: March 28, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Chiaming Chai, Shaoping Ge, Stephen Edward Liles, Chintan Hemendrakumar Shah
  • DYNAMIC VOLTAGE LEVEL SHIFTERS EMPLOYING PULSE GENERATION CIRCUITS, AND RELATED SYSTEMS AND METHODS
    Publication number: 20170047930
    Abstract: Dynamic voltage level shifters employing pulse generation circuits are disclosed. In one aspect, a dynamic voltage level shifter includes a dynamic voltage level shifting circuit. The dynamic voltage level shifting circuit includes a pre-charge circuit configured to provide supply voltage of a first voltage domain to a dynamic node in response to a clock signal having pre-charge voltage. An evaluate circuit is configured to provide ground voltage to the dynamic node in response to an input signal having an active voltage while the clock signal has evaluate voltage. A keeper circuit is configured to provide a reduced drive strength to the dynamic node in response to pulse signal. The pulse signal is generated by a pulse generation circuit, wherein a pulse width of the pulse signal correlates to a difference in supply voltages of first and second voltage domains.
    Type: Application
    Filed: August 14, 2015
    Publication date: February 16, 2017
    Inventors: Chiaming Chai, Shaoping Ge, Stephen Edward Liles, Chintan Hemendrakumar Shah