Abstract: A repeater includes N repeater circuits coupled to integrator device in a star topology. Each of the N repeater circuits has an Input/Output port for transmitting a clock, data, control and collision signal. A request-for-access signal within the control signals is asserted as repeater circuit is requesting a data repetition. The integrator device has N Input/Output interfaces each of which is coupled to a corresponding Input/Output port, for selectively executing the data repetition and generating the collision signal, in response to the clock and control signals, so that the repeater functions as a single repeater.