Patents by Inventor Chiou Jun YEAN

Chiou Jun YEAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Device arrangement structure assembly having adhesive tape layer
    Patent number: 11024552
    Abstract: An assembly includes a wafer having a top wafer surface and a wafer circumference. The assembly further includes a device arrangement structure. The device arrangement structure includes a first surface having a perimeter, the perimeter being encircled by the wafer circumference in a plan view; and an array of devices, each device of the array of devices having an electrical contact on the first surface. The assembly further includes an adhesive element configured to affix the device arrangement structure in a stationary position relative to the wafer, wherein the adhesive element includes a tape layer having an adhesive surface attached to the top surface of the device arrangement structure and attached to a surface of the wafer.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: June 1, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun Hao Liao, Chu Fu Chen, Mingo Liu, Chiou Jun Yean
  • DEVICE ARRANGEMENT STRUCTURE ASSEMBLY
    Publication number: 20200152526
    Abstract: An assembly includes a wafer having a top wafer surface and a wafer circumference. The assembly further includes a device arrangement structure. The device arrangement structure includes a first surface having a perimeter, the perimeter being encircled by the wafer circumference in a plan view; and an array of devices, each device of the array of devices having an electrical contact on the first surface. The assembly further includes an adhesive element configured to affix the device arrangement structure in a stationary position relative to the wafer, wherein the adhesive element includes a tape layer having an adhesive surface attached to the top surface of the device arrangement structure and attached to a surface of the wafer.
    Type: Application
    Filed: January 10, 2020
    Publication date: May 14, 2020
    Inventors: Chun Hao LIAO, Chu Fu CHEN, Mingo LIU, Chiou Jun YEAN
  • Device arrangement structure assembly and test method
    Patent number: 10535572
    Abstract: An assembly includes a wafer having a top wafer surface and a wafer circumference and a device arrangement structure. The device arrangement structure includes a first surface having a perimeter, the perimeter being encircled by the wafer circumference in a plan view. The device arrangement structure also includes an array of devices, each device of the array of devices having an electrical contact on the first surface. The assembly has an adhesive element that affixes the device arrangement structure in a stationary position relative to the wafer.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: January 14, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun Hao Liao, Chu Fu Chen, Mingo Liu, Chiou Jun Yean
  • DEVICE ARRANGEMENT STRUCTURE ASSEMBLY AND TEST METHOD
    Publication number: 20170301659
    Abstract: An assembly includes a wafer having a top wafer surface and a wafer circumference and a device arrangement structure. The device arrangement structure includes a first surface having a perimeter, the perimeter being encircled by the wafer circumference in a plan view. The device arrangement structure also includes an array of devices, each device of the array of devices having an electrical contact on the first surface. The assembly has an adhesive element that affixes the device arrangement structure in a stationary position relative to the wafer.
    Type: Application
    Filed: June 27, 2016
    Publication date: October 19, 2017
    Inventors: Chun Hao LIAO, Chu Fu CHEN, Mingo LIU, Chiou Jun YEAN