Patents by Inventor Chirag Shroff

Chirag Shroff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12254123
    Abstract: According to certain embodiments, a method comprises performing a posture assessment at a trust anchor in order to determine whether a hardware component is authorized to run on a product. Performing the posture assessment comprises determining a random value (K), encrypting the random value (K) using a long-term key associated with the hardware component in order to yield an encrypted value, communicating the encrypted value to the hardware component, and receiving, from the hardware component, a message encrypted using the random value (K). The message comprises an identifier associated with the hardware component. Performing the posture assessment further comprises determining whether the hardware component is authorized to run on the product based at least in part on the identifier associated with the hardware component. The method further comprises performing an action that depends on whether the hardware component is authorized to run on the product.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: March 18, 2025
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Chirag Shroff, David McGrew
  • Patent number: 12072981
    Abstract: According to certain embodiments, a method performed by a trust anchor comprises determining a random value (K), encrypting the random value (K) using a long-term key associated with a hardware component in order to yield an encrypted value, communicating the encrypted value to the hardware component, and receiving a response encrypted using the random value (K). The response is received from the hardware component. The method further comprise encrypting a schema using the random value (K) and sending the encrypted schema to the hardware component. The schema indicates functionality that the hardware component is authorized to enable.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: August 27, 2024
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Chirag Shroff, David McGrew
  • Publication number: 20240202313
    Abstract: Techniques and architecture are described to control a debug port access employing the debug image signed offline by a challenge/response mechanism, where the signed image itself is tied to an ECID of a chip together with debug lifecycle information coming from fuses and a hash of a loader being debugged. All these inputs form a nonce (the debug image) that ties the debug image to the hardware being debugged and is restricted to the current debug lifecycle. The cryptographically signed debug image is authenticated by a boot image (or the chip) with a public key in the debug image. The debug image may be expanded to secure maintenance using a secure maintenance blob or “firmware maintenance certificate or nonce.” The secure maintenance blob also includes a natural attribute list of low-level features to be enabled upon verification of the secure maintenance blob.
    Type: Application
    Filed: December 19, 2022
    Publication date: June 20, 2024
    Inventors: Chandan Singh, Ofer Licht, Chirag Shroff, Srinivas Kothapally
  • Publication number: 20240184890
    Abstract: A method of operating a system-on-chip (SOC) including decrypting, by isolated Root of Trust (RoT) code, a Stock Keeping Unit (SKU) license code from a host during bootup of a device. Then validating, by the isolated RoT code, the SKU license code with firmware and at least one built-in key of a plurality of built-in keys from secure storage. Finally, enabling or disabling, by the isolated RoT code, at least one feature set of a plurality of feature sets comprising resources configured at the SOC based on at least one SKU license code which has been decrypted by isolated RoT code using at least one built-in key and authenticated by firmware.
    Type: Application
    Filed: August 29, 2023
    Publication date: June 6, 2024
    Inventors: Sachin Agarwal, Srirajkumar Sundararaman, Aviran Kadosh, Samir Valjibhai Rajgor, Chirag Shroff, Kevin Shyh-Kang Chang, Dylan Walker
  • Patent number: 11816219
    Abstract: According to certain embodiments, a method comprises performing a posture assessment at a trust anchor in order to determine whether a hardware component is authorized to run on a product. Performing the posture assessment comprises determining a random value (K), encrypting the random value (K) using a long-term key associated with the hardware component in order to yield an encrypted value, communicating the encrypted value to the hardware component, and determining whether the hardware component is authorized to run on the product based at least in part on whether the trust anchor receives, from the hardware component, a response encrypted using the random value (K). The method further comprises allowing or preventing the hardware component from running on the product based on whether the hardware component is authorized to run on the product.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: November 14, 2023
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Chirag Shroff, David McGrew
  • Patent number: 11784807
    Abstract: According to certain embodiments, a method comprises receiving an encrypted value from a trust anchor. The encrypted value is received by a hardware component, and the encrypted value is associated with a posture assessment in which the trust anchor determines whether the hardware component is authorized to run on a product. The method further comprises obtaining a random value (K) based on decrypting the encrypted value. The decrypting uses a long-term key associated with the hardware component. The method further comprises communicating an encrypted response to the trust anchor. The encrypted response is encrypted using the random value (K). The encrypted response enables the trust anchor to determine whether the hardware component is authorized to run on the product.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: October 10, 2023
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Chirag Shroff, David McGrew
  • Publication number: 20220382912
    Abstract: According to certain embodiments, a method comprises performing a posture assessment at a trust anchor in order to determine whether a hardware component is authorized to run on a product. Performing the posture assessment comprises determining a random value (K), encrypting the random value (K) using a long-term key associated with the hardware component in order to yield an encrypted value, communicating the encrypted value to the hardware component, and receiving, from the hardware component, a message encrypted using the random value (K). The message comprises an identifier associated with the hardware component. Performing the posture assessment further comprises determining whether the hardware component is authorized to run on the product based at least in part on the identifier associated with the hardware component. The method further comprises performing an action that depends on whether the hardware component is authorized to run on the product.
    Type: Application
    Filed: June 1, 2021
    Publication date: December 1, 2022
    Inventors: Chirag Shroff, David McGrew
  • Publication number: 20220385462
    Abstract: According to certain embodiments, a method comprises receiving an encrypted value from a trust anchor. The encrypted value is received by a hardware component, and the encrypted value is associated with a posture assessment in which the trust anchor determines whether the hardware component is authorized to run on a product. The method further comprises obtaining a random value (K) based on decrypting the encrypted value. The decrypting uses a long-term key associated with the hardware component. The method further comprises communicating an encrypted response to the trust anchor. The encrypted response is encrypted using the random value (K). The encrypted response enables the trust anchor to determine whether the hardware component is authorized to run on the product.
    Type: Application
    Filed: June 1, 2021
    Publication date: December 1, 2022
    Inventors: Chirag Shroff, David McGrew
  • Publication number: 20220382867
    Abstract: According to certain embodiments, a method performed by a trust anchor comprises determining a random value (K), encrypting the random value (K) using a long-term key associated with a hardware component in order to yield an encrypted value, communicating the encrypted value to the hardware component, and receiving a response encrypted using the random value (K). The response is received from the hardware component. The method further comprise encrypting a schema using the random value (K) and sending the encrypted schema to the hardware component. The schema indicates functionality that the hardware component is authorized to enable.
    Type: Application
    Filed: June 1, 2021
    Publication date: December 1, 2022
    Inventors: Chirag Shroff, David McGrew
  • Publication number: 20220382866
    Abstract: According to certain embodiments, a method comprises performing a posture assessment at a trust anchor in order to determine whether a hardware component is authorized to run on a product. Performing the posture assessment comprises determining a random value (K), encrypting the random value (K) using a long-term key associated with the hardware component in order to yield an encrypted value, communicating the encrypted value to the hardware component, and determining whether the hardware component is authorized to run on the product based at least in part on whether the trust anchor receives, from the hardware component, a response encrypted using the random value (K). The method further comprises allowing or preventing the hardware component from running on the product based on whether the hardware component is authorized to run on the product.
    Type: Application
    Filed: June 1, 2021
    Publication date: December 1, 2022
    Inventors: Chirag Shroff, David McGrew
  • Patent number: 11436333
    Abstract: Presented herein are methodologies for securing BIOS/bootloader function including booting a computer system from a BIOS image stored in a first boot flash device, detecting an indication of a pending BIOS upgrade, in response to detecting the indication of a pending BIOS upgrade, accessing an upgraded BIOS image stored on a second boot flash device, validating a version of the upgraded BIOS image, authenticating the upgraded BIOS image using a signature stored in a first region of the second boot flash device, when the version of the upgraded BIOS image is validated, and the upgraded BIOS image is authenticated, writing the signature to a second region of the second boot flash device that is different from the first region, locking the second region of the second boot flash device, and rebooting the computer system from the second boot flash device.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: September 6, 2022
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Chandan Singh, Chandrashekar Sodankoor, Chirag Shroff, Gregory James Waldschmidt
  • Patent number: 10929807
    Abstract: A method includes modifying a product with a first configuration such that the product is configured in accordance with a second configuration, generating data representative of the second configuration, obtaining a signed version of the data representative of the second configuration, and storing the signed version of the data representative of the second configuration in a wireless read/write accessory that is affixed to the product, wherein the wireless read/write accessory includes a prior signed version of data representative of the first configuration.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: February 23, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Chirag Shroff, Anthony H. Grieco
  • Publication number: 20200320200
    Abstract: Presented herein are methodologies for securing BIOS/bootloader function including booting a computer system from a BIOS image stored in a first boot flash device, detecting an indication of a pending BIOS upgrade, in response to detecting the indication of a pending BIOS upgrade, accessing an upgraded BIOS image stored on a second boot flash device, validating a version of the upgraded BIOS image, authenticating the upgraded BIOS image using a signature stored in a first region of the second boot flash device, when the version of the upgraded BIOS image is validated, and the upgraded BIOS image is authenticated, writing the signature to a second region of the second boot flash device that is different from the first region, locking the second region of the second boot flash device, and rebooting the computer system from the second boot flash device.
    Type: Application
    Filed: April 8, 2019
    Publication date: October 8, 2020
    Inventors: Chandan Singh, Chandrashekar Sodankoor, Chirag Shroff, Gregory James Waldschmidt
  • Patent number: 10761955
    Abstract: Techniques are provided for monitoring power consumption for individual systems or devices as a way to detect illicit or rogue hardware, e.g., addition of an unauthorized integrated circuit (IC), which may have been added to an existing system. Techniques include monitoring a power on sequence of a system, the power on sequence including one or more distinct stages, determining for each stage of the one or more distinct stages of the power on sequence, whether an observed power load of any distinct stage has deviated from an expected power load according to a power profile for the system, and when the observed power load of a given distinct stage has deviated from the expected power load, performing an action indicating that a deviation from the expected power load has occurred. The power profile specifies expected power characteristics of the system for each stage of a power on sequence.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: September 1, 2020
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Anthony H. Grieco, Chirag Shroff
  • Patent number: 10659234
    Abstract: In one embodiment, a computing device receives an image that has been signed with a first key, wherein the image includes a first computational value associated with it. A second computational value associated with the image is determined and the image is signed with a second key to produce a signed image that includes both the first and second computational values. Prior to loading the dual-signed image, the computing device attempts to authenticate the dual-signed image using both the first and second computational values, and, if successful, loads and installs the dual-signed image.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: May 19, 2020
    Assignee: Cisco Technology, Inc.
    Inventors: Kannan Varadhan, Chirag Shroff, Rakesh Chopra
  • Publication number: 20180157572
    Abstract: Techniques are provided for monitoring power consumption for individual systems or devices as a way to detect illicit or rogue hardware, e.g., addition of an unauthorized integrated circuit (IC), which may have been added to an existing system. Techniques include monitoring a power on sequence of a system, the power on sequence including one or more distinct stages, determining for each stage of the one or more distinct stages of the power on sequence, whether an observed power load of any distinct stage has deviated from an expected power load according to a power profile for the system, and when the observed power load of a given distinct stage has deviated from the expected power load, performing an action indicating that a deviation from the expected power load has occurred. The power profile specifies expected power characteristics of the system for each stage of a power on sequence.
    Type: Application
    Filed: February 8, 2018
    Publication date: June 7, 2018
    Inventors: Anthony H. Grieco, Chirag Shroff
  • Patent number: 9940486
    Abstract: A trusted guard module stores one or more identifiers, each identifier uniquely identifying a respective electronic component of one or more electronic components in a circuit, wherein each electronic component is previously programmed with its respective identifier. In one embodiment, the one or more electronic components are in communication with the guard module via a test data channel. A query is sent from the guard module to one of the components via the test data channel, requesting that the queried component provide its respective identifier to the guard module. The guard module then receives a response from the queried component via the test data channel. The guard module compares the response to the stored identifier for the queried component. If the response fails to correspond to the stored identifier for the queried component, the guard module asserts an alarm condition.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: April 10, 2018
    Assignee: Cisco Technology, Inc.
    Inventors: Anthony H. Grieco, Chirag Shroff
  • Patent number: 9934119
    Abstract: Techniques are provided for monitoring power consumption for individual systems or devices as a way to detect illicit or rogue hardware, e.g., addition of an unauthorized integrated circuit (IC), which may have been added to an existing system. Techniques include monitoring a power on sequence of a system, the power on sequence including one or more distinct stages, determining for each stage of the one or more distinct stages of the power on sequence, whether an observed power load of any distinct stage has deviated from an expected power load according to a power profile for the system, and when the observed power load of a given distinct stage has deviated from the expected power load, performing an action indicating that a deviation from the expected power load has occurred. The power profile specifies expected power characteristics of the system for each stage of a power on sequence.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: April 3, 2018
    Assignee: Cisco Technology, Inc.
    Inventors: Anthony H. Grieco, Chirag Shroff
  • Patent number: 9830456
    Abstract: A trusted processor is pre-booted using a secure pre-boot loader integrated with the trusted processor. The trusted processor verifies whether an external boot loader is valid, and when valid, the trusted processor is booted using the external boot loader, thereby enabling trusted operation of the trusted processor. The trusted processor verifies whether a firmware image for a field programmable device is valid, and when valid, a firmware image loading process for the field programmable device is triggered. When the firmware image loading process is triggered, the firmware image is loaded into the field programmable device and the field programmable device is released to execute of the firmware image. The field programmable device verifies whether an external boot loader for an untrusted processor is valid, and when valid, the untrusted processor is booted using the external boot loader for the untrusted processor, thereby enabling trusted operation of the untrusted processor.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: November 28, 2017
    Assignee: Cisco Technology, Inc.
    Inventors: Anthony H. Grieco, Chirag Shroff
  • Publication number: 20170262792
    Abstract: A method includes modifying a product with a first configuration such that the product is configured in accordance with a second configuration, generating data representative of the second configuration, obtaining a signed version of the data representative of the second configuration, and storing the signed version of the data representative of the second configuration in a wireless read/write accessory that is affixed to the product, wherein the wireless read/write accessory includes a prior signed version of data representative of the first configuration.
    Type: Application
    Filed: March 11, 2016
    Publication date: September 14, 2017
    Inventors: Chirag Shroff, Anthony H. Grieco