Patents by Inventor Chitresh Narasimhaiah

Chitresh Narasimhaiah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10671535
    Abstract: A prefetcher maintains the state of stored prefetch information, such as a prefetch confidence level, when a prefetch would cross a memory page boundary. The maintained prefetch information can be used both to identify whether the stride pattern for a particular sequence of demand requests persists after the memory page boundary has been crossed, and to continue to issue prefetch requests according to the identified pattern. The prefetcher therefore does not have re-identify a stride pattern each time a page boundary is crossed by a sequence of demand requests, thereby improving the efficiency and accuracy of the prefetcher.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: June 2, 2020
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: John Kalamatianos, Paul Keltcher, Marius Evers, Chitresh Narasimhaiah
  • Patent number: 9058277
    Abstract: Methods and systems for prefetching data for a processor are provided. A system is configured for and a method includes selecting one of a first prefetching control logic and a second prefetching control logic of the processor as a candidate feature, capturing the performance metric of the processor over an inactive sample period when the candidate feature is inactive, capturing a performance metric of the processor over an active sample period when the candidate feature is active, comparing the performance metric of the processor for the active and inactive sample periods, and setting a status of the candidate feature as enabled when the performance metric in the active period indicates improvement over the performance metric in the inactive period, and as disabled when the performance metric in the inactive period indicates improvement over the performance metric in the active period.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: June 16, 2015
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Sharad Dilip Bade, Alok Garg, John Kalamatianos, Paul Keltcher, Marius Evers, Chitresh Narasimhaiah
  • Publication number: 20150026414
    Abstract: A prefetcher maintains the state of stored prefetch information, such as a prefetch confidence level, when a prefetch would cross a memory page boundary. The maintained prefetch information can be used both to identify whether the stride pattern for a particular sequence of demand requests persists after the memory page boundary has been crossed, and to continue to issue prefetch requests according to the identified pattern. The prefetcher therefore does not have re-identify a stride pattern each time a page boundary is crossed by a sequence of demand requests, thereby improving the efficiency and accuracy of the prefetcher.
    Type: Application
    Filed: July 17, 2013
    Publication date: January 22, 2015
    Applicant: Advanced Micro Devices, Inc.
    Inventors: John Kalamatianos, Paul Keltcher, Marius Evers, Chitresh Narasimhaiah
  • Publication number: 20140129780
    Abstract: Methods and systems for prefetching data for a processor are provided. A system is configured for and a method includes selecting one of a first prefetching control logic and a second prefetching control logic of the processor as a candidate feature, capturing the performance metric of the processor over an inactive sample period when the candidate feature is inactive, capturing a performance metric of the processor over an active sample period when the candidate feature is active, comparing the performance metric of the processor for the active and inactive sample periods, and setting a status of the candidate feature as enabled when the performance metric in the active period indicates improvement over the performance metric in the inactive period, and as disabled when the performance metric in the inactive period indicates improvement over the performance metric in the active period.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 8, 2014
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Sharad Dilip Bade, Alok Garg, John Kalamatianos, Paul Keltcher, Marius Evers, Chitresh Narasimhaiah
  • Publication number: 20140108740
    Abstract: A processing system monitors memory bandwidth available to transfer data from memory to a cache. In addition, the processing system monitors a prefetching accuracy for prefetched data. If the amount of available memory bandwidth is low and the prefetching accuracy is also low, prefetching can be throttled by reducing the amount of data prefetched. The prefetching can be throttled by changing the frequency of prefetching, prefetching depth, prefetching confidence levels, and the like.
    Type: Application
    Filed: October 17, 2012
    Publication date: April 17, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Todd Rafacz, Marius Evers, Chitresh Narasimhaiah
  • Publication number: 20050015671
    Abstract: A system for on-chip testing of embedded memories using Address Space Identifier (ASI) bus in Scalable Processor ARChitecture (SPARC) microprocessors. An integrated circuit includes a plurality of memory arrays, Address Space Identifier (ASI) bus interface logic connected by an ASI bus to the plurality of memory arrays, and a memory control unit and a memory built-in self-test (MBIST) engine connected to the ASI bus interface logic. Rather than direct access, the MBIST engine utilizes the ASI bus interface logic and the ASI bus to perform memory testing. The MBIST engine, programmed with memory array parameters, includes a programmable state machine controller to which is connected a programmable data generator, a programmable address generator, and a programmable comparator. The data generator provides data as appropriate. The address generator provides addresses as appropriate. The comparator provides test results information for the particular test situation.
    Type: Application
    Filed: June 30, 2003
    Publication date: January 20, 2005
    Inventors: Ishwardutt Parulkar, Chitresh Narasimhaiah