Patents by Inventor Chiu Chan
Chiu Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20220296001Abstract: This invention includes a method to produce a customizable and user-configurable mattress foam core which comprises a plurality of transversely extended foam rods that were cut during the mattress production process. These transversely extended foam rods typically have a cross section of a convex shape, including triangles, squares, rectangles, circles, ovals and hexagons. These transversely extended foam rods can be replaced with foam rods of different firmness, creating more than 10 zones with varying firmness in each zone thus tailoring to the sleeper's needs, adjusting for their differences in height, weight, sleeping position, and comfort preference. Also, these zones together allow the user to configure the mattress for spinal alignment. The transversely extended replacement foam rods typically have cross sections that are substantially the same shape as the pre-cut foam rods, but may also be of different shape.Type: ApplicationFiled: February 25, 2021Publication date: September 22, 2022Inventor: Chiu Chan
-
Patent number: 11136665Abstract: Embodiments of the invention contemplate a shadow ring that provides increased or decreased and more uniform deposition on the edge of a wafer. By removing material from the top and/or bottom surfaces of the shadow ring, increased edge deposition and bevel coverage can be realized. In one embodiment, the material on the bottom surface is reduced by providing a recessed slot on the bottom surface. By increasing the amount of material of the shadow ring, the edge deposition and bevel coverage is reduced. Another approach to adjusting the deposition at the edge of the wafer includes increasing or decreasing the inner diameter of the shadow ring. The material forming the shadow ring may also be varied to change the amount of deposition at the edge of the wafer.Type: GrantFiled: January 28, 2019Date of Patent: October 5, 2021Assignee: Applied Materials, Inc.Inventors: Dale Du Bois, Mohamad A. Ayoub, Robert Kim, Amit Kumar Bansal, Mark Fodor, Binh Nguyen, Siu F. Cheng, Hang Yu, Chiu Chan, Ganesh Balasubramanian, Deenesh Padhi, Juan Carlos Rocha
-
Publication number: 20190153592Abstract: Embodiments of the invention contemplate a shadow ring that provides increased or decreased and more uniform deposition on the edge of a wafer. By removing material from the top and/or bottom surfaces of the shadow ring, increased edge deposition and bevel coverage can be realized. In one embodiment, the material on the bottom surface is reduced by providing a recessed slot on the bottom surface. By increasing the amount of material of the shadow ring, the edge deposition and bevel coverage is reduced. Another approach to adjusting the deposition at the edge of the wafer includes increasing or decreasing the inner diameter of the shadow ring. The material forming the shadow ring may also be varied to change the amount of deposition at the edge of the wafer.Type: ApplicationFiled: January 28, 2019Publication date: May 23, 2019Inventors: Dale Du BOIS, Mohamad A. AYOUB, Robert KIM, Amit Kumar BANSAL, Mark FODOR, Binh NGUYEN, Siu F. CHENG, Hang YU, Chiu CHAN, Ganesh BALASUBRAMANIAN, Deenesh PADHI, Juan Carlos ROCHA
-
Patent number: 10227695Abstract: Embodiments of the invention contemplate a shadow ring that provides increased or decreased and more uniform deposition on the edge of a wafer. By removing material from the top and/or bottom surfaces of the shadow ring, increased edge deposition and bevel coverage can be realized. In one embodiment, the material on the bottom surface is reduced by providing a recessed slot on the bottom surface. By increasing the amount of material of the shadow ring, the edge deposition and bevel coverage is reduced. Another approach to adjusting the deposition at the edge of the wafer includes increasing or decreasing the inner diameter of the shadow ring. The material forming the shadow ring may also be varied to change the amount of deposition at the edge of the wafer.Type: GrantFiled: December 21, 2010Date of Patent: March 12, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Dale R. Du Bois, Mohamad A. Ayoub, Robert Kim, Amit Bansal, Mark Fodor, Binh Nguyen, Siu F. Cheng, Hang Yu, Chiu Chan, Ganesh Balasubramanian, Deenesh Padhi, Juan Carlos Rocha
-
Patent number: 9653327Abstract: Embodiments of the invention generally relate to methods of removing and/or cleaning a substrate surface having different material layers disposed thereon using water vapor plasma treatment. In one embodiment, a method for cleaning a surface of a substrate includes positioning a substrate into a processing chamber, the substrate having a dielectric layer disposed thereon forming openings on the substrate, exposing the dielectric layer disposed on the substrate to water vapor supplied into the chamber to form a plasma in the water vapor, maintaining a process pressure in the chamber at between about 1 Torr and about 120 Torr, and cleaning the contact structure formed on the substrate.Type: GrantFiled: November 8, 2011Date of Patent: May 16, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Kwangduk Douglas Lee, Sudha Rathi, Chiu Chan, Martin J. Seamons, Bok Heon Kim
-
Patent number: 9337072Abstract: The present invention generally provides methods and apparatus for monitoring and maintaining flatness of a substrate in a plasma reactor. Certain embodiments of the present invention provide a method for processing a substrate comprising positioning the substrate on an electrostatic chuck, applying an RF power between the an electrode in the electrostatic chuck and a counter electrode positioned parallel to the electrostatic chuck, applying a DC bias to the electrode in the electrostatic chuck to clamp the substrate on the electrostatic chuck, and measuring an imaginary impedance of the electrostatic chuck.Type: GrantFiled: November 19, 2010Date of Patent: May 10, 2016Assignee: APPLIED MATERIALS, INC.Inventors: Ganesh Balasubramanian, Amit Bansal, Eller Y. Juco, Mohamad Ayoub, Hyung-Joon Kim, Karthik Janakiraman, Sudha Rathi, Deenesh Padhi, Martin Jay Seamons, Visweswaren Sivaramakrishnan, Bok Hoen Kim, Amir Al-Bayati, Derek R. Witty, Hichem M'Saad, Anton Baryshnikov, Chiu Chan, Shuang Liu
-
Patent number: 8993454Abstract: Embodiments of the present invention generally relate to the fabrication of integrated circuits and particularly to the deposition of a boron containing amorphous carbon layer on a semiconductor substrate. In one embodiment, a boron-containing amorphous carbon film is disclosed. The boron-containing amorphous carbon film comprises from about 10 to 60 atomic percentage of boron, from about 20 to about 50 atomic percentage of carbon, and from about 10 to about 30 atomic percentage of hydrogen.Type: GrantFiled: September 16, 2013Date of Patent: March 31, 2015Assignee: Applied Materials, Inc.Inventors: Martin Jay Seamons, Sudha Rathi, Kwangduk Douglas Lee, Deenesh Padhi, Bok Hoen Kim, Chiu Chan
-
Publication number: 20140017897Abstract: Embodiments of the present invention generally relate to the fabrication of integrated circuits and particularly to the deposition of a boron containing amorphous carbon layer on a semiconductor substrate. In one embodiment, a boron-containing amorphous carbon film is disclosed. The boron-containing amorphous carbon film comprises from about 10 to 60 atomic percentage of boron, from about 20 to about 50 atomic percentage of carbon, and from about 10 to about 30 atomic percentage of hydrogen.Type: ApplicationFiled: September 16, 2013Publication date: January 16, 2014Applicant: APPLIED MATERIALS, INC.Inventors: Martin Jay SEAMONS, Sudha RATHI, Kwangduk Douglas LEE, Deenesh PADHI, Bok Hoen KIM, Chiu CHAN
-
Publication number: 20130284090Abstract: Methods and apparatus for depositing uniform boron-containing films are disclosed. A first precursor is delivered to a chamber through a first pathway having a first flow controller and a composition sensor. A second precursor is delivered by a second pathway, including a second flow controller, to a mixing point fluidly coupling the first and second pathways. A controller is coupled to the vibration sensor and the first and second flow controllers. The first precursor may be a mixture of diborane and a diluent gas, and the second precursor is typically a diluent gas. The flow rate of the first precursor may be set by determining a concentration of diborane in the first precursor from the composition sensor reading, and setting the flow rate to maintain a desired flow rate of diborane. The flow rate of the second precursor may be set to maintain a desired flow to the chamber.Type: ApplicationFiled: April 17, 2013Publication date: October 31, 2013Inventors: Ganesh BALASUBRAMANIAN, Martin Jay SEAMONS, Kaushik ALAYAVALLI, Kwangduk Douglas LEE, Wendy H. YEH, Sudha RATHI, Krishna VIJAYARAGHAVAN, Chiu CHAN
-
Patent number: 8536065Abstract: Embodiments of the present invention generally relate to the fabrication of integrated circuits and particularly to the deposition of a boron containing amorphous carbon layer on a semiconductor substrate. In one embodiment, a method of processing a substrate in a processing chamber is provided. The method comprises providing a substrate in a processing volume, flowing a hydrocarbon containing gas mixture into the processing volume, generating a plasma of the hydrocarbon containing gas mixture by applying power from an RF source, flowing a boron containing gas mixture into the processing volume, and depositing a boron containing amorphous carbon film on the substrate in the presence of the plasma, wherein the boron containing amorphous carbon film contains from about 30 to about 60 atomic percentage of boron.Type: GrantFiled: September 30, 2011Date of Patent: September 17, 2013Assignee: Applied Materials, Inc.Inventors: Martin Jay Seamons, Sudha Rathi, Kwangduk Douglas Lee, Deenesh Padhi, Bok Hoen Kim, Chiu Chan
-
Patent number: 8513129Abstract: Methods for manufacturing a semiconductor device are provided. In one embodiment, a method includes providing a base material having a first film stack deposited thereon, wherein the base material is formed over the substrate and has a first set of interconnect features. The first film stack comprises a first amorphous carbon layer deposited on a surface of the base material, a first anti-reflective coating layer deposited on the first amorphous carbon layer, and a first photoresist layer deposited on the first anti-reflective coating layer. The first photoresist layer is patterned by shifting laterally a projection of a mask on the first photoresist layer relative to the substrate a desired distance, thereby introducing into the first photoresist layer a first feature pattern to be transferred to the underlying base material, wherein the first feature pattern is not aligned with the first set of interconnect features.Type: GrantFiled: May 28, 2010Date of Patent: August 20, 2013Assignee: Applied Materials, Inc.Inventors: Martin Jay Seamons, Kwangduk Douglas Lee, Chiu Chan, Patrick Reilly, Sudha Rathi
-
Patent number: 8361906Abstract: A method of forming an amorphous carbon layer on a substrate in a substrate processing chamber, includes introducing a hydrocarbon source into the processing chamber, introducing argon, alone or in combination with helium, hydrogen, nitrogen, and combinations thereof, into the processing chamber, wherein the argon has a volumetric flow rate to hydrocarbon source volumetric flow rate ratio of about 10:1 to about 20:1, generating a plasma in the processing chamber at a substantially lower pressure of about 2 Torr to 10 Torr, and forming a conformal amorphous carbon layer on the substrate.Type: GrantFiled: May 20, 2010Date of Patent: January 29, 2013Assignee: Applied Materials, Inc.Inventors: Kwangduk Douglas Lee, Martin Jay Seamons, Sudha Rathi, Chiu Chan, Michael H. Lin
-
Publication number: 20120285481Abstract: Embodiments of the invention generally relate to methods of removing and/or cleaning a substrate surface having different material layers disposed thereon using water vapor plasma treatment. In one embodiment, a method for cleaning a surface of a substrate includes positioning a substrate into a processing chamber, the substrate having a dielectric layer disposed thereon forming openings on the substrate, exposing the dielectric layer disposed on the substrate to water vapor supplied into the chamber to form a plasma in the water vapor, maintaining a process pressure in the chamber at between about 1 Torr and about 120 Torr, and cleaning the contact structure formed on the substrate.Type: ApplicationFiled: November 8, 2011Publication date: November 15, 2012Applicant: APPLIED MATERIALS, INC.Inventors: Kwangduk Douglas Lee, Sudha Rathi, Chiu Chan, Martin J. Seamons, Bok Heon Kim
-
Patent number: 8282734Abstract: An article having a protective coating for use in semiconductor applications and methods for making the same are provided. In certain embodiments, a method of coating an aluminum surface of an article utilized in a semiconductor processing chamber is provided. The method comprises providing a processing chamber; placing the article into the processing chamber; flowing a first gas comprising a carbon source into the processing chamber; flowing a second gas comprising a nitrogen source into the processing chamber; forming a plasma in the chamber; and depositing a coating material on the aluminum surface. In certain embodiments, the coating material comprises an amorphous carbon nitrogen containing layer. In certain embodiments, the article comprises a showerhead configured to deliver a gas to the processing chamber.Type: GrantFiled: October 21, 2008Date of Patent: October 9, 2012Assignee: Applied Materials, Inc.Inventors: Deenesh Padhi, Chiu Chan, Sudha Rathi, Ganesh Balasubramanian, Jianhua Zhou, Karthik Janakiraman, Martin J. Seamons, Visweswaren Sivaramakrishnan, Derek R. Witty, Hichem M'Saad
-
Publication number: 20120211164Abstract: Embodiments described herein relate to a substrate processing system that integrates substrate edge processing capabilities. Illustrated examples of the processing system include, without limitations, a factory interface, a loadlock chamber, a transfer chamber, and one or more twin process chambers having two or more processing regions that are isolatable from each other and share a common gas supply and a common exhaust pump. The processing regions in each twin process chamber include separate gas distribution assemblies and RF power sources to provide plasma at selective regions on a substrate surface in each processing region. Each twin process chamber is thereby configured to allow multiple, isolated processes to be performed concurrently on at least two substrates in the processing regions.Type: ApplicationFiled: April 25, 2012Publication date: August 23, 2012Applicant: Applied Materials, Inc.Inventors: Ashish Shah, Dale R. DuBois, Ganesh Balasubramanian, Mark A. Fodor, Eui Kyoon Kim, Chiu Chan, Karthik Janakiraman, Thomas Nowak, Joseph C. Werner, Visweswaren Sivaramakrishnan, Mohamad Ayoub, Amir Al-Bayati, Jianhua Zhou
-
Publication number: 20120208373Abstract: A method for depositing an amorphous carbon layer on a substrate includes the steps of positioning a substrate in a chamber, introducing a hydrocarbon source into the processing chamber, introducing a heavy noble gas into the processing chamber, and generating a plasma in the processing chamber. The heavy noble gas is selected from the group consisting of argon, krypton, xenon, and combinations thereof and the molar flow rate of the noble gas is greater than the molar flow rate of the hydrocarbon source. A post-deposition termination step may be included, wherein the flow of the hydrocarbon source and the noble gas is stopped and a plasma is maintained in the chamber for a period of time to remove particles therefrom.Type: ApplicationFiled: April 25, 2012Publication date: August 16, 2012Applicant: Applied Materials, Inc.Inventors: DEENESH PADHI, Hyoung-Chan Ha, Sudha Rathi, Derek R. Witty, Chiu Chan, Sohyun Park, Ganesh Balasubramanian, Karthik Janakiraman, Martin Jay Seamons, Visweswaren Sivaramakrishnan, Bok Hoen Kim, Hichem M'Saad
-
Patent number: D680999Type: GrantFiled: September 28, 2012Date of Patent: April 30, 2013Inventor: Chiu Chan
-
Patent number: D695259Type: GrantFiled: May 19, 2013Date of Patent: December 10, 2013Assignee: Berwick Industrial Co. LimitedInventor: Chiu Chan
-
Patent number: D709478Type: GrantFiled: May 20, 2013Date of Patent: July 22, 2014Assignee: Berwick Industrial Co. LimitedInventor: Chiu Chan
-
Patent number: D719711Type: GrantFiled: November 7, 2013Date of Patent: December 16, 2014Inventors: Michael Mozeika, III, Michael Mozeika, Jr., Chiu Chan, Robert Mohr