Patents by Inventor Chiu-Fang Hsu

Chiu-Fang Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11882683
    Abstract: A method of forming a semiconductor memory device, the semiconductor memory device includes a plurality of active areas, a shallow trench isolation, a plurality of trenches and a plurality of gates. The active areas are defined on a semiconductor substrate, and surrounded by the shallow trench isolation. The trenches are disposed in the semiconductor substrate, penetrating through the active areas and the shallow trench isolation, wherein each of the trenches includes a bottom surface and a saddle portion protruded therefrom in each active areas. The gates are disposed in the trenches respectively.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: January 23, 2024
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Chien-Ming Lu, Fu-Che Lee, Chien-Cheng Tsai, Chiu-Fang Hsu
  • Publication number: 20220122988
    Abstract: A method of forming a semiconductor memory device, the semiconductor memory device includes a plurality of active areas, a shallow trench isolation, a plurality of trenches and a plurality of gates. The active areas are defined on a semiconductor substrate, and surrounded by the shallow trench isolation. The trenches are disposed in the semiconductor substrate, penetrating through the active areas and the shallow trench isolation, wherein each of the trenches includes a bottom surface and a saddle portion protruded therefrom in each active areas. The gates are disposed in the trenches respectively.
    Type: Application
    Filed: December 23, 2021
    Publication date: April 21, 2022
    Applicants: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Chien-Ming Lu, Fu-Che Lee, Chien-Cheng Tsai, Chiu-Fang Hsu
  • Publication number: 20180286868
    Abstract: A semiconductor memory device and a method of forming the same, the semiconductor memory device includes a plurality of active areas, a shallow trench isolation, a plurality of trenches and a plurality of gates. The active areas are defined on a semiconductor substrate, and surrounded by the shallow trench isolation. The trenches are disposed in the semiconductor substrate, penetrating through the active areas and the shallow trench isolation, wherein each of the trenches includes a bottom surface and a saddle portion protruded therefrom in each active areas. The gates are disposed in the trenches respectively.
    Type: Application
    Filed: March 2, 2018
    Publication date: October 4, 2018
    Inventors: Chien-Ming Lu, Fu-Che Lee, Chien-Cheng Tsai, Chiu-Fang Hsu