Patents by Inventor Chiu-Hsien Chang

Chiu-Hsien Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9313879
    Abstract: A motherboard with an electrostatic discharge protection (ESD) function including a first electrode, a second electrode, an isolation region and an energy storage unit is disclosed. The first electrode receives a grounding level. The second electrode includes at least one solder pad to fix an input/output port thereon. The isolation region is disposed between the first and the second electrodes. The energy storage unit is coupled between the first and the second electrodes and disposed across the isolation region.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: April 12, 2016
    Assignee: WISTRON CORP.
    Inventors: Lung-Fai Tuen, Wen-Hsien Wang, Chiu-Hsien Chang
  • Patent number: 9250279
    Abstract: A measuring system for measuring signal characteristics on a node is disclosed. The measuring system includes a contact measuring unit including a probe for contacting the node to fetch a signal on the node, an output interface, a plurality of capacitors coupled between the probe and the output interface where a capacitance of each capacitor corresponds to a frequency range, and a protection circuit, of which one terminal coupled between the probe and the output interface and the other terminal coupled to a ground terminal, and a frequency analyzer coupled to the output interface for displaying information of amplitude vs. frequency of a signal outputted from the output interface to measure the signal characteristic on the node.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: February 2, 2016
    Assignee: Wistron Corporation
    Inventors: Hung-Kai Chang, Chung-Yaw Su, Chiu-Hsien Chang
  • Patent number: 9065273
    Abstract: A power adaptor for converting an alternating voltage into a direct voltage to a load is disclosed. The power adaptor includes a primary side circuit including a hot line, a neutral line for receiving the alternating voltage, and a return terminal, a secondary side circuit including a positive output terminal and a negative output terminal for outputting the direct voltage, and a protection circuit including a first non-linear resistor coupled to the return terminal of the primary side circuit and the negative output terminal of the secondary side circuit forming an electrostatic discharge path for an electrostatic current generated by the load.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: June 23, 2015
    Assignee: Wistron Corporation
    Inventors: Lung-Fai Tuen, Chiu-Hsien Chang
  • Patent number: 9000795
    Abstract: An electrical collecting cover for covering an electrostatic gun is disclosed. The electrical collecting cover includes a connecting portion for connecting with a main body of the electrostatic gun, a shielding portion connected to the connecting portion for shielding the main body of the electrostatic gun, a sleeve portion connected to the shielding portion for sheathing with a discharging head of the electrostatic gun, and an electrostatic discharge portion connected to the sleeve portion and located on a side of the discharging head for guiding static electricity from the discharging head of the electrostatic gun as the sleeve portion sheathes with the discharging head of the electrostatic gun.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: April 7, 2015
    Assignee: Wistron Corporation
    Inventors: Chiu-Hsien Chang, Lung-Fai Tuen, Wei-Cheng Lin
  • Publication number: 20140240876
    Abstract: A motherboard with an electrostatic discharge protection (ESD) function including a first electrode, a second electrode, an isolation region and an energy storage unit is disclosed. The first electrode receives a grounding level. The second electrode includes at least one solder pad to fix an input/output port thereon. The isolation region is disposed between the first and the second electrodes. The energy storage unit is coupled between the first and the second electrodes and disposed across the isolation region.
    Type: Application
    Filed: October 17, 2013
    Publication date: August 28, 2014
    Applicant: Wistron Corp.
    Inventors: Lung-Fai TUEN, Wen-Hsien WANG, Chiu-Hsien CHANG
  • Patent number: 8816693
    Abstract: An ESD test method for testing an object is disclosed. The object is activated and controlled to separate from a horizontal plane by a pre-determined distance. A first discharge voltage is provided to an external metal portion of the object. A first error is determined to have or have not occurred during the operation of the object each time after the first discharge voltage is provided to the external metal portion. The object is processed to eliminate the first error and then the first discharge voltage is provided to the external metal portion when the first error occurs during the operation of the object. The first error is induced by a hardware structure of the object. The object is moved to contact with the horizontal plane and a specific action is executed when the first error has not occurred during the operation of the object.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: August 26, 2014
    Assignee: Wistron Corp.
    Inventors: Lung-Fai Tuen, Chiu-Hsien Chang
  • Patent number: 8693152
    Abstract: A Power over Ethernet (PoE) Power Device (PD) circuit and a protection circuit of electrostatic discharge (ESD) thereof are provided. The protection circuit of ESD includes a transient voltage suppressor (TVS) and a high-voltage capacitor, wherein the TVS and the high-voltage capacitor are coupled in series between a negative power terminal and a grounding terminal to reduce system malfunctions or damages when ESD or transient voltage surge occurs.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: April 8, 2014
    Assignee: Wistron Corp.
    Inventors: Lung-Fai Tuen, Shan-Hung Wang, Chiu-Hsien Chang
  • Publication number: 20140049863
    Abstract: A power adaptor for converting an alternating voltage into a direct voltage to a load is disclosed. The power adaptor includes a primary side circuit including a hot line, a neutral line for receiving the alternating voltage, and a return terminal, a secondary side circuit including a positive output terminal and a negative output terminal for outputting the direct voltage, and a protection circuit including a first non-linear resistor coupled to the return terminal of the primary side circuit and the negative output terminal of the secondary side circuit forming an electrostatic discharge path for an electrostatic current generated by the load.
    Type: Application
    Filed: May 16, 2013
    Publication date: February 20, 2014
    Applicant: Wistron Corporation
    Inventors: Lung-Fai Tuen, Chiu-Hsien Chang
  • Publication number: 20140021964
    Abstract: A measuring system for measuring signal characteristics on a node is disclosed. The measuring system includes a contact measuring unit including a probe for contacting the node to fetch a signal on the node, an output interface, a plurality of capacitors coupled between the probe and the output interface where a capacitance of each capacitor corresponds to a frequency range, and a protection circuit, of which one terminal coupled between the probe and the output interface and the other terminal coupled to a ground terminal, and a frequency analyzer coupled to the output interface for displaying information of amplitude vs. frequency of a signal outputted from the output interface to measure the signal characteristic on the node.
    Type: Application
    Filed: March 11, 2013
    Publication date: January 23, 2014
    Applicant: WISTRON CORPORATION
    Inventors: Hung-Kai Chang, Chung-Yaw Su, Chiu-Hsien Chang
  • Publication number: 20130300427
    Abstract: An ESD test method for testing an object is disclosed. The object is activated and controlled to separate from a horizontal plane by a pre-determined distance. A first discharge voltage is provided to an external metal portion of the object. A first error is determined to have or have not occurred during the operation of the object each time after the first discharge voltage is provided to the external metal portion. The object is processed to eliminate the first error and then the first discharge voltage is provided to the external metal portion when the first error occurs during the operation of the object. The first error is induced by a hardware structure of the object. The object is moved to contact with the horizontal plane and a specific action is executed when the first error has not occurred during the operation of the object.
    Type: Application
    Filed: June 28, 2012
    Publication date: November 14, 2013
    Applicant: WISTRON CORP.
    Inventors: Lung-Fai Tuen, Chiu-Hsien Chang
  • Publication number: 20130031383
    Abstract: A Power over Ethernet (PoE) Power Device (PD) circuit and a protection circuit of electrostatic discharge (ESD) thereof are provided. The protection circuit of ESD includes a transient voltage suppressor (TVS) and a high-voltage capacitor, wherein the TVS and the high-voltage capacitor are coupled in series between a negative power terminal and a grounding terminal to reduce system malfunctions or damages when ESD or transient voltage surge occurs.
    Type: Application
    Filed: May 29, 2012
    Publication date: January 31, 2013
    Applicant: WISTRON CORP.
    Inventors: LUNG-FAI TUEN, SHAN-HUNG WANG, CHIU-HSIEN CHANG
  • Publication number: 20130015836
    Abstract: A low noise step-down converter includes a rectified voltage output, a pulse generator, a rectifying diode, a rectifying inductor, a rectifying capacitor, and an impedance element. The rectified voltage output is provided for outputting a converted voltage. The pulse generator includes a pulse wave output. The pulse generator receives an input voltage and outputs a pulse wave through the pulse wave output. The rectifying diode is reversely coupled to the pulse wave output. One end of the rectifying inductor is connected to the pulse wave output for receiving the pulse wave while the other is connected to the rectified voltage output. One end of the rectifying capacitor is connected to the rectified voltage output, and the other end is electrically grounded. The impedance element at least provides resistance impedance and inductance impedance, wherein the rectifying diode and the impedance element are connected in series and are electrically grounded.
    Type: Application
    Filed: September 14, 2011
    Publication date: January 17, 2013
    Applicant: Wistron Corporation
    Inventors: Chiu-Hsien Chang, Ming-Feng Wu, Nai-Shuo Cheng, Yen-Ting Chen
  • Publication number: 20120320557
    Abstract: An electrical collecting cover for covering an electrostatic gun is disclosed. The electrical collecting cover includes a connecting portion for connecting with a main body of the electrostatic gun, a shielding portion connected to the connecting portion for shielding the main body of the electrostatic gun, a sleeve portion connected to the shielding portion for sheathing with a discharging head of the electrostatic gun, and an electrostatic discharge portion connected to the sleeve portion and located on a side of the discharging head for guiding static electricity from the discharging head of the electrostatic gun as the sleeve portion sheathes with the discharging head of the electrostatic gun.
    Type: Application
    Filed: October 5, 2011
    Publication date: December 20, 2012
    Inventors: Chiu-Hsien CHANG, Lung-Fai TUEN, Wei-Cheng LIN
  • Patent number: 8305771
    Abstract: An electromagnetic interference suppressing device includes a plurality of signal guiding units coupled to a metal housing of an electronic component for receiving a plurality of signals transmitted from the metal housing (the electronic component is installed on a circuit board), a plurality of grounding units coupled to a plurality of ground pads of the circuit board for transmitting the plurality of signals to the plurality of ground pads, and a main body coupled to the plurality of signal guiding units and the plurality of grounding units for transmitting the plurality of signals between the plurality of signal guiding units and the plurality of grounding units so as to implement a return path.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: November 6, 2012
    Assignee: Wistron Corporation
    Inventors: Lung-Fai Tuen, Chiu-Hsien Chang, Hong-Kuei Lee, Chi-Fang Weng, Chen-Yu Li
  • Publication number: 20100246154
    Abstract: An electromagnetic interference suppressing device includes a plurality of signal guiding units coupled to a metal housing of an electronic component for receiving a plurality of signals transmitted from the metal housing (the electronic component is installed on a circuit board), a plurality of grounding units coupled to a plurality of ground pads of the circuit board for transmitting the plurality of signals to the plurality of ground pads, and a main body coupled to the plurality of signal guiding units and the plurality of grounding units for transmitting the plurality of signals between the plurality of signal guiding units and the plurality of grounding units so as to implement a return path.
    Type: Application
    Filed: February 25, 2010
    Publication date: September 30, 2010
    Inventors: Lung-Fai Tuen, Chiu-Hsien Chang, Hong-Kuei Lee, Chi-Fang Weng, Chen-Yu Li
  • Publication number: 20070086220
    Abstract: A circuit board for reducing EMI characteristics and a power adapter and a notebook computer having the circuit board are disclosed. The circuit board includes: a base board; an upper-site transistor having a power pin; and a lower-site transistor having a ground pin; wherein the upper-site transistor and the lower-site transistor are coupled to each other and placed next to each on the same side of the base board. The power pin and the ground pin are close to each other, and positions of the power pin and the ground pin form an angle that is substantially less than 90°.
    Type: Application
    Filed: February 3, 2006
    Publication date: April 19, 2007
    Applicant: Wistron Corporation
    Inventors: Chiu-Hsien Chang, Chung-Yaw Su