Patents by Inventor Chiu Ng

Chiu Ng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10164078
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device with multi-trench enhancement regions. Such a bipolar semiconductor device includes a drift region having a first conductivity type situated over an anode layer having an opposite, second conductivity type. The device also includes a first control trench extending through an inversion region having the second conductivity type, and further extending into the drift region, the first control trench being adjacent to cathode diffusions. In addition, the device includes first and second depletion trenches, each having a depletion electrode, the first depletion trench being situated between the second depletion trench and the first control trench. An enhancement region having the first conductivity type is localized in the drift region and extends from the first control trench to the first second depletion trench and further from the first depletion trench to the second depletion trench.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: December 25, 2018
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Florin Udrea, Gianluca Camuso, Alice Pei-Shan Hsieh, Chiu Ng, Yi Tang, Rajeev Krishna Vytla, Canhua Li
  • Patent number: 10115812
    Abstract: A semiconductor device includes a drift region of a first conductivity type, an anode region of a second conductivity type situated below the drift region, an inversion region of the second conductivity type situated above the drift region, an enhancement region of the first conductivity type situated between the drift region and the inversion region, first and second control trenches extending through the inversion region and the enhancement region into the drift region, each control trench being bordered by a cathode diffusion region of the first conductivity type, and a superjunction structure situated in the drift region between the first and the second control trenches so that the superjunction structure does not extend under either the first or the second control trench. The superjunction structure is separated from the inversion region by the enhancement region and includes alternating regions of the first and the second conductivity types.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: October 30, 2018
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Patent number: 9871128
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device with sub-cathode enhancement regions. Such a bipolar semiconductor device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type opposite the first conductivity type. The bipolar semiconductor device also includes first and second depletion trenches, each having a depletion electrode. In addition, the bipolar semiconductor device includes a first control trench situated between the first and second depletion trenches, the first control trench extending into the drift region and being adjacent to cathode diffusions. An enhancement region having the first conductivity type is localized in the drift region between the first control trench and one or both of the first and second depletion trenches. In one implementation, the bipolar semiconductor device may be an insulated-gate bipolar transistor (IGBT).
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: January 16, 2018
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Florin Udrea, Gianluca Camuso, Alice Pei-Shan Hsieh, Chiu Ng, Yi Tang, Rajeev Krishna Vytla, Canhua Li
  • Publication number: 20180012983
    Abstract: A semiconductor device includes a drift region of a first conductivity type, an anode region of a second conductivity type situated below the drift region, an inversion region of the second conductivity type situated above the drift region, an enhancement region of the first conductivity type situated between the drift region and the inversion region, first and second control trenches extending through the inversion region and the enhancement region into the drift region, each control trench being bordered by a cathode diffusion region of the first conductivity type, and a superjunction structure situated in the drift region between the first and the second control trenches so that the superjunction structure does not extend under either the first or the second control trench. The superjunction structure is separated from the inversion region by the enhancement region and includes alternating regions of the first and the second conductivity types.
    Type: Application
    Filed: September 1, 2017
    Publication date: January 11, 2018
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Patent number: 9859407
    Abstract: There are disclosed herein various implementations of an insulated-gate bipolar transistor (IGBT) with buried depletion electrode. Such an IGBT may include a collector at a bottom surface of a semiconductor substrate, a drift region having a first conductivity type situated over the collector, and a base layer having a second conductivity type opposite the first conductivity type situated over the drift region. The IGBT also includes a plurality of deep insulated trenches with a buried depletion electrode and at least one gate electrode disposed therein. In addition, the IGBT includes an active cell including an emitter adjacent the gate electrode, and an implant zone, situated between adjacent deep insulated trenches. The implant zone is formed below the base layer and has the first conductivity type. In one implementation, the IGBT may also include a dummy cell neighboring the active cell.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: January 2, 2018
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Yi Tang, Niraj Ranjan, Chiu Ng
  • Patent number: 9831330
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device having a deep charge-balanced structure. Such a device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type. The device also includes a control trench extending through an inversion region having the second conductivity type into the drift region, and bordered by a cathode diffusion having the first conductivity type. In addition, the device includes a deep sub-trench structure situated under the control trench. The deep sub-trench structure includes one or more first conductivity regions having the first conductivity type and one or more second conductivity region having the second conductivity type, the one or more first conductivity regions and the one or more second conductivity regions configured to substantially charge-balance the deep sub-trench structure.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: November 28, 2017
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Patent number: 9799725
    Abstract: There are disclosed herein various implementations of an insulated-gate bipolar transistor (IGBT) having a deep superjunction structure. Such an IGBT includes a drift region having a first conductivity type situated over a collector having a second conductivity type. The IGBT also includes a gate trench extending through a base having the second conductivity type into the drift region. In addition, the IGBT includes a deep superjunction structure situated under the gate trench. The deep superjunction structure includes one or more first conductivity regions having the first conductivity type and two or more second conductivity region having the second conductivity type, the one or more first conductivity regions and the two or more second conductivity regions configured to substantially charge-balance the deep superjunction structure.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: October 24, 2017
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Publication number: 20170271488
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device with multi-trench enhancement regions. Such a bipolar semiconductor device includes a drift region having a first conductivity type situated over an anode layer having an opposite, second conductivity type. The device also includes a first control trench extending through an inversion region having the second conductivity type, and further extending into the drift region, the first control trench being adjacent to cathode diffusions. In addition, the device includes first and second depletion trenches, each having a depletion electrode, the first depletion trench being situated between the second depletion trench and the first control trench. An enhancement region having the first conductivity type is localized in the drift region and extends from the first control trench to the first second depletion trench and further from the first depletion trench to the second depletion trench.
    Type: Application
    Filed: March 18, 2016
    Publication date: September 21, 2017
    Inventors: Florin Udrea, Gianluca Camuso, Alice Pei-Shan Hsieh, Chiu Ng, Yi Tang, Rajeev Krishna Vytla, Canhua Li
  • Publication number: 20170271445
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device having localized enhancement regions. Such a bipolar semiconductor device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type opposite the first conductivity type. The bipolar semiconductor device also includes a first control trench extending through an inversion region having the second conductivity type, and further extending into the drift region, the first control trench being adjacent to cathode diffusions. In addition, the bipolar semiconductor device includes first and second depletion trenches, each having a depletion electrode, the first depletion trench being situated between the second depletion trench and the first control trench. An enhancement region having the first conductivity type is localized in the drift region between the first and second depletion trenches.
    Type: Application
    Filed: March 18, 2016
    Publication date: September 21, 2017
    Inventors: Florin Udrea, Gianluca Camuso, Alice Pei-Shan Hsieh, Chiu Ng, Yi Tang, Rajeev Krishna Vytla, Canhua Li
  • Publication number: 20170271487
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device with sub-cathode enhancement regions. Such a bipolar semiconductor device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type opposite the first conductivity type. The bipolar semiconductor device also includes first and second depletion trenches, each having a depletion electrode. In addition, the bipolar semiconductor device includes a first control trench situated between the first and second depletion trenches, the first control trench extending into the drift region and being adjacent to cathode diffusions. An enhancement region having the first conductivity type is localized in the drift region between the first control trench and one or both of the first and second depletion trenches. In one implementation, the bipolar semiconductor device may be an insulated-gate bipolar transistor (IGBT).
    Type: Application
    Filed: March 18, 2016
    Publication date: September 21, 2017
    Inventors: Florin Udrea, Gianluca Camuso, Alice Pei-Shan Hsieh, Chiu Ng, Yi Tang, Rajeev Krishna Vytla, Canhua Li
  • Patent number: 9768284
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device having a charge-balanced inter-trench structure. Such a device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type. The device also includes first and second control trenches extending through an inversion region having the second conductivity type into the drift region, each of the first and second control trenches being bordered by a cathode diffusion having the first conductivity type. In addition, the device includes an inter-trench structure situated in the drift region between the first and second control trenches.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: September 19, 2017
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Patent number: 9685506
    Abstract: There are disclosed herein implementations of an insulated-gate bipolar transistor (IGBT) having an inter-trench superjunction structure. Such an IGBT includes a drift region having a first conductivity type situated over a collector having a second conductivity type. The IGBT also includes first and second gate trenches extending through a base having the second conductivity type into the drift region, the first and second gate trenches each being bordered by an emitter diffusion having the first conductivity type. In addition, the IGBT includes an inter-trench superjunction structure situated in the drift region between the first and second gate trenches.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: June 20, 2017
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Patent number: 9496378
    Abstract: There are disclosed herein various implementations of an insulated gate bipolar transistor (IGBT) with buried emitter electrodes. Such an IGBT may include a collector at a bottom surface of a semiconductor substrate, a drift region having a first conductivity type situated over the collector, and a base layer having a second conductivity type opposite the first conductivity type situated over the drift region. In addition, such an IGBT may include deep insulated trenches extending from a semiconductor surface above the base layer, into the drift region, each of the deep insulated trenches having a buried emitter electrode disposed therein. The IGBT may further include an active cell including an emitter, a gate trench with a gate electrode disposed therein, and an implant zone situated, between adjacent deep insulated trenches. The implant zone is formed below the base layer and has the first conductivity type.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: November 15, 2016
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Yi Tang, Niraj Ranjan, Chiu Ng
  • Publication number: 20160260823
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device having a deep charge-balanced structure. Such a device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type. The device also includes a control trench extending through an inversion region having the second conductivity type into the drift region, and bordered by a cathode diffusion having the first conductivity type. In addition, the device includes a deep sub-trench structure situated under the control trench. The deep sub-trench structure includes one or more first conductivity regions having the first conductivity type and one or more second conductivity region having the second conductivity type, the one or more first conductivity regions and the one or more second conductivity regions configured to substantially charge-balance the deep sub-trench structure.
    Type: Application
    Filed: December 31, 2015
    Publication date: September 8, 2016
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Publication number: 20160260799
    Abstract: There are disclosed herein implementations of an insulated-gate bipolar transistor (IGBT) having an inter-trench superjunction structure. Such an IGBT includes a drift region having a first conductivity type situated over a collector having a second conductivity type. The IGBT also includes first and second gate trenches extending through a base having the second conductivity type into the drift region, the first and second gate trenches each being bordered by an emitter diffusion having the first conductivity type. In addition, the IGBT includes an inter-trench superjunction structure situated in the drift region between the first and second gate trenches.
    Type: Application
    Filed: December 31, 2015
    Publication date: September 8, 2016
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Publication number: 20160260824
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device having a charge-balanced inter-trench structure. Such a device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type. The device also includes first and second control trenches extending through an inversion region having the second conductivity type into the drift region, each of the first and second control trenches being bordered by a cathode diffusion having the first conductivity type. In addition, the device includes an inter-trench structure situated in the drift region between the first and second control trenches.
    Type: Application
    Filed: December 31, 2015
    Publication date: September 8, 2016
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Publication number: 20160260825
    Abstract: There are disclosed herein various implementations of an insulated-gate bipolar transistor (IGBT) having a deep superjunction structure. Such an IGBT includes a drift region having a first conductivity type situated over a collector having a second conductivity type. The IGBT also includes a gate trench extending through a base having the second conductivity type into the drift region. In addition, the IGBT includes a deep superjunction structure situated under the gate trench. The deep superjunction structure includes one or more first conductivity regions having the first conductivity type and two or more second conductivity region having the second conductivity type, the one or more first conductivity regions and the two or more second conductivity regions configured to substantially charge-balance the deep superjunction structure.
    Type: Application
    Filed: December 31, 2015
    Publication date: September 8, 2016
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Publication number: 20160204238
    Abstract: There are disclosed herein various implementations of an insulated-gate bipolar transistor (IGBT) with buried depletion electrode. Such an IGBT may include a collector at a bottom surface of a semiconductor substrate, a drift region having a first conductivity type situated over the collector, and a base layer having a second conductivity type opposite the first conductivity type situated over the drift region. The IGBT also includes a plurality of deep insulated trenches with a buried depletion electrode and at least one gate electrode disposed therein. In addition, the IGBT includes an active cell including an emitter adjacent the gate electrode, and an implant zone, situated between adjacent deep insulated trenches. The implant zone is formed below the base layer and has the first conductivity type. In one implementation, the IGBT may also include a dummy cell neighboring the active cell.
    Type: Application
    Filed: March 23, 2016
    Publication date: July 14, 2016
    Inventors: Yi Tang, Niraj Ranjan, Chiu Ng
  • Publication number: 20160155832
    Abstract: There are disclosed herein various implementations of an insulated gate bipolar transistor (IGBT) with buried emitter electrodes. Such an IGBT may include a collector at a bottom surface of a semiconductor substrate, a drift region having a first conductivity type situated over the collector, and a base layer having a second conductivity type opposite the first conductivity type situated over the drift region. In addition, such an IGBT may include deep insulated trenches extending from a semiconductor surface above the base layer, into the drift region, each of the deep insulated trenches having a buried emitter electrode disposed therein. The IGBT may further include an active cell including an emitter, a gate trench with a gate electrode disposed therein, and an implant zone situated, between adjacent deep insulated trenches. The implant zone is formed below the base layer and has the first conductivity type.
    Type: Application
    Filed: January 20, 2016
    Publication date: June 2, 2016
    Inventors: Yi Tang, Niraj Ranjan, Chiu Ng
  • Patent number: 9299819
    Abstract: There are disclosed herein various implementations of an insulated-gate bipolar transistor (IGBT) with buried depletion electrode. Such an IGBT may include a collector at a bottom surface of a semiconductor substrate, a drift region having a first conductivity type situated over the collector, and a base layer having a second conductivity type opposite the first conductivity type situated over the drift region. The IGBT also includes a plurality of deep insulated trenches with a buried depletion electrode and at least one gate electrode disposed therein. In addition, the IGBT includes an active cell including an emitter adjacent the gate electrode, and an implant zone, situated between adjacent deep insulated trenches. The implant zone is formed below the base layer and has the first conductivity type. In one implementation, the IGBT may also include a dummy cell neighboring the active cell.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: March 29, 2016
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Yi Tang, Niraj Ranjan, Chiu Ng