Patents by Inventor Chiu-Tsun Chu

Chiu-Tsun Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit with on-chip clock frequency matching to upstream head end equipment
    Patent number: 7362767
    Abstract: One aspect of the present invention concerns a method for controlling the frequency of oscillation of a local clock signal comprising the steps of (A) generating the clock signal in response to a first control signal, (B) generating the first control signal in response to one of a plurality of adjustment signals selected in response to a second control signal and (C) generating the second control signal in response to a comparison between a local timestamp and an external timestamp.
    Type: Grant
    Filed: July 22, 2003
    Date of Patent: April 22, 2008
    Assignee: LSI Logic Corporation
    Inventors: Omer F. Orberk, Ho-Ming Leung, Chiu-Tsun Chu, Gary Chang
  • Built-in debug feature for complex VLSI chip
    Patent number: 7111199
    Abstract: An apparatus comprising (i) a first circuit configured to generate one or more node signals at one or more internal nodes and (ii) a second circuit configured to present one or more of the node signals and a trigger signal in response to one or more control signals.
    Type: Grant
    Filed: July 8, 2002
    Date of Patent: September 19, 2006
    Assignee: LSI Logic Corporation
    Inventors: Ho-Ming Leung, Fan Zhang, Chiu-Tsun Chu, Gary Chang
  • Integrated circuit with on-chip clock frequency matching to upstream head end equipment
    Publication number: 20050018692
    Abstract: One aspect of the present invention concerns a method for controlling the frequency of oscillation of a local clock signal comprising the steps of (A) generating the clock signal in response to a first control signal, (B) generating the first control signal in response to one of a plurality of adjustment signals selected in response to a second control signal and (C) generating the second control signal in response to a comparison between a local timestamp and an external timestamp.
    Type: Application
    Filed: July 22, 2003
    Publication date: January 27, 2005
    Inventors: Omer Orberk, Ho-Ming Leung, Chiu-Tsun Chu, Gary Chang
  • Built-in debug feature for complex VLSI chip
    Publication number: 20040004279
    Abstract: An apparatus comprising (i) a first circuit configured to generate one or more node signals at one or more internal nodes and (ii) a second circuit configured to present one or more of the node signals and a trigger signal in response to one or more control signals.
    Type: Application
    Filed: July 8, 2002
    Publication date: January 8, 2004
    Applicant: LSI LOGIC CORPORATION
    Inventors: Ho-Ming Leung, Fan Zhang, Chiu-Tsun Chu, Gary Chang