Patents by Inventor Chiu Wing Hui

Chiu Wing Hui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9081919
    Abstract: System and methods for design-for-manufacturing and design-enabled-manufacturing (DFM-DEM) proactive integrated manufacturing flow are presented. A method includes receiving design data related to layout of an integrated circuit (IC); extracting information from the design data; and performing analysis on the extracted information. The method also enables DFM-DEM aware manufacturing applications using information stored in a knowledge database. The method further updates the knowledge database with new information learned from at least the extracted information and the analysis.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: July 14, 2015
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Vito Dai, Beng Lye Oh, Chiu Wing Hui, Yeow Loye Siew
  • Patent number: 9064084
    Abstract: Enhancements in lithography for forming an integrated circuit are disclosed. The enhancements include a topography analysis of a design data file to obtain accumulative topography information for different mask levels. The topography information facilitates topography driven optical proximity correction and topography driven lithography.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: June 23, 2015
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Ushasree Katakamsetty, Yang Qing, Wee Kwong Yeo, Chiu Wing Hui, Shyue Fong Quek, Valerio Perez
  • Publication number: 20140282288
    Abstract: System and methods for design-for-manufacturing and design-enabled-manufacturing (DFM-DEM) proactive integrated manufacturing flow are presented. A method includes receiving design data related to layout of an integrated circuit (IC); extracting information from the design data; and performing analysis on the extracted information. The method also enables DFM-DEM aware manufacturing applications using information stored in a knowledge database. The method further updates the knowledge database with new information learned from at least the extracted information and the analysis.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 18, 2014
    Inventors: Vito DAI, Beng Lye OH, Chiu Wing HUI, Yeow Loye SIEW
  • Publication number: 20140282300
    Abstract: Enhancements in lithography for forming an integrated circuit are disclosed. The enhancements include a topography analysis of a design data file to obtain accumulative topography information for different mask levels. The topography information facilitates topography driven optical proximity correction and topography driven lithography.
    Type: Application
    Filed: April 24, 2014
    Publication date: September 18, 2014
    Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Ushasree KATAKAMSETTY, Yang QING, Wee Kwong YEO, Chiu Wing HUI, Shyue Fong QUEK, Valerio PEREZ
  • Patent number: 8726221
    Abstract: A method for selecting and placing of an IP block in a SOC design based on a topology and/or a density of the SOC design is disclosed. Embodiments include: displaying a user interface; causing, at least in part, a presentation in the user interface of a topology and density view of a SOC design that includes an IP block; and modifying, prior to a tape-out of the SOC design, topology and/or density transition for the IP block in the SOC design based on the presentation.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: May 13, 2014
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Edward Kah Ching Teoh, Ushasree Katakamsetty, Chiu Wing Hui
  • Publication number: 20130339916
    Abstract: A method for selecting and placing of an IP block in a SOC design based on a topology and/or a density of the SOC design is disclosed. Embodiments include: displaying a user interface; causing, at least in part, a presentation in the user interface of a topology and density view of a SOC design that includes an IP block; and modifying, prior to a tape-out of the SOC design, topology and/or density transition for the IP block in the SOC design based on the presentation.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 19, 2013
    Applicant: GLOBALFOUNDRIES Singapore Pte.Ltd.
    Inventors: Edward Kah Ching Teoh, Ushasree Katakamsetty, Chiu Wing Hui