Abstract: An electronic system includes a plurality of function modules, each of the plurality of function modules operates according to one of a plurality of clock signals; and a clock management module, for generating the plurality of clock signals according to a plurality of performances requirements of the plurality of function modules.

Abstract: An electronic system includes a plurality of function modules, each of the plurality of function modules operates according to one of a plurality of clock signals; and a clock management module, for generating the plurality of clock signals according to a plurality of performances requirements of the plurality of function modules.

Abstract: An overdrive apparatus includes a data storage device, a plurality of table storage devices, and a table access interface. The data storage device is arranged for storing a plurality of overdrive look-up tables corresponding to a plurality of first display regions included in a display area of a display apparatus. The table storage devices are arranged for storing a plurality of selected overdrive look-up tables, respectively. The table access interface is coupled between the data storage device and the table storage devices, and arranged for loading the selected overdrive look-up tables selected from the overdrive look-up tables stored in the data storage device into the table storage devices. The number of the table storage devices is smaller than the number of the display regions.

Abstract: An overdrive apparatus includes a data storage device, a plurality of table storage devices, and a table access interface. The data storage device is arranged for storing a plurality of overdrive look-up tables corresponding to a plurality of first display regions included in a display area of a display apparatus. The table storage devices are arranged for storing a plurality of selected overdrive look-up tables, respectively. The table access interface is coupled between the data storage device and the table storage devices, and arranged for loading the selected overdrive look-up tables selected from the overdrive look-up tables stored in the data storage device into the table storage devices. The number of the table storage devices is smaller than the number of the display regions.

Abstract: An image processing apparatus includes a processing circuit and a storage system. The processing circuit generates a first processing result and a second processing result by processing a first horizontal line group of a first frame and a second horizontal line group of a second frame preceding the first frame, respectively. The storage system includes: a frame buffer; a write circuit for storing the first processing result into the frame buffer; a read circuit for reading the second processing result from the frame buffer; and a timing controller for controlling the write circuit to start storing the first processing result at a first time point not prior to a specific time point when the processing circuit finishes receiving the first horizontal line group, and controlling the read circuit to start reading the second processing result at a second time point which is prior to the specific time point.

Abstract: An image processing apparatus includes a storage device, an image detection circuit, a compression circuit, a decompression circuit, and an overdrive processing circuit. The image detection circuit generates a compression mode control signal according to a first frame. The compression circuit compresses an image data of a second frame according to the compression mode control signal, thereby generating a compressed image data of the second frame to the storage device. The first frame precedes the second frame. The decompression circuit decompresses the compressed image data of the second frame read from the storage device according to the compression mode control signal, thereby generating a recovered image data of the second frame. The overdrive processing circuit determines overdrive voltages of a third frame according to an image data of the third frame and the recovered image data of the second frame, where the second frame precedes the third frame.

Abstract: An exemplary image data compression apparatus includes a compression circuit, a characteristic value extracting circuit, and a selecting circuit. The compression circuit is utilized for applying a plurality of different compression approaches to a first block, and accordingly generating a plurality of first candidate compression results of the first block. The characteristic value extracting circuit is coupled to the compression circuit, and utilized for deriving a plurality of first characteristic values from the first candidate compression results, respectively. The selecting circuit is coupled to the compression circuit and the characteristic value extracting circuit, and utilized for selecting a target compression result of the first block from the first candidate compression results according to the first characteristic values and at least one characteristic value threshold.

Abstract: An image processing apparatus includes a processing circuit and a storage system. The processing circuit generates a first processing result and a second processing result by processing a first horizontal line group of a first frame and a second horizontal line group of a second frame preceding the first frame, respectively. The storage system includes: a frame buffer; a write circuit for storing the first processing result into the frame buffer; a read circuit for reading the second processing result from the frame buffer; and a timing controller for controlling the write circuit to start storing the first processing result at a first time point not prior to a specific time point when the processing circuit finishes receiving the first horizontal line group, and controlling the read circuit to start reading the second processing result at a second time point which is prior to the specific time point.

Abstract: An image processing apparatus includes a storage device, an image detection circuit, a compression circuit, a decompression circuit, and an overdrive processing circuit. The image detection circuit generates a compression mode control signal according to a first frame. The compression circuit compresses an image data of a second frame according to the compression mode control signal, thereby generating a compressed image data of the second frame to the storage device. The first frame precedes the second frame. The decompression circuit decompresses the compressed image data of the second frame read from the storage device according to the compression mode control signal, thereby generating a recovered image data of the second frame. The overdrive processing circuit determines overdrive voltages of a third frame according to an image data of the third frame and the recovered image data of the second frame, where the second frame precedes the third frame.

Abstract: An exemplary image data compression apparatus includes a compression circuit, a characteristic value extracting circuit, and a selecting circuit. The compression circuit is utilized for applying a plurality of different compression approaches to a first block, and accordingly generating a plurality of first candidate compression results of the first block. The characteristic value extracting circuit is coupled to the compression circuit, and utilized for deriving a plurality of first characteristic values from the first candidate compression results, respectively. The selecting circuit is coupled to the compression circuit and the characteristic value extracting circuit, and utilized for selecting a target compression result of the first block from the first candidate compression results according to the first characteristic values and at least one characteristic value threshold.

Abstract: An image data decoding method of an image vertical blanking interval (VBI) and device thereof can adjust a run-in clock signal of data lines of teletext to a data phase of teletext data lines. The method can accurately decode data of the teletext data lines to avoid a phase bias and an erroneous decoding result. A main technical method to decode the data of the VBI is to extract the data of the teletext data lines to determine corresponding bit logical values of the image data and then to output a decode result and also output a phase adjustment value. The phase adjustment value is used to adjust a read phase value of the extracted image so as to synchronize a data phase in VBI.

Abstract: The image data synchronizer has a memory, an address write counter, an address read counter, a clock frequency modulator, and an analog/digital mixed value control oscillator. In order to prevent a read overhead to cause a disordered image, the analog/digital mixed value control oscillator is coupled to an output terminal of the clock frequency modulator to generate an output clock signal as the read clock signal for the address read counter in accordance with a clock adjustment value, so as to form the feedback compensation architecture.

Abstract: An image data decoding method of an image vertical blanking interval (VBI) and device thereof in accordance with the present invention can adjust a run-in clock signal of data lines of teletext to be corresponding to a data phase of teletext data lines. The present invention can accurately decode data of the teletext data lines to avoid a phase bias and an erroneous decoding result. A main technical method to decode the data of the VBI is to extract the data of the teletext data lines to determine corresponding bit logical values of the image data and then to output a decode result and also output a phase adjustment value. The phase adjustment value is used to adjust a read phase value of the extracted image, to feedback and adjust a phase of a sampling clock signal to synchronize a data phase in VBI.