Patents by Inventor Chiung-Liang Lin
Chiung-Liang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240134931Abstract: A matrix computing device and an operation method for the matrix computing device are provided. The matrix computing device includes a storage unit, a control circuit, and a computing circuit. The storage unit includes a weight matrix. The control circuit re-orders an arrangement order of weights in the weight matrix according to a shape of an output matrix to determine a weight readout order of the weights. The computing circuit receives the weights based on the weight readout order, and performs a matrix computation on the weights and an input matrix to generate a computing matrix. The control circuit performs a reshape transformation on the computing matrix to generate the output matrix, and writes the output matrix to the storage unit.Type: ApplicationFiled: December 7, 2022Publication date: April 25, 2024Applicant: NEUCHIPS CORPORATIONInventors: Chiung-Liang Lin, YuShan Ruan, Huan Jan Chou
-
Patent number: 11836214Abstract: A matrix calculation device including a storing unit, a multiply accumulate (MAC) circuit, a pre-fetch circuit, and a control circuit, and an operation method thereof are provided. The storing unit stores a first and second matrixes. The MAC circuit is configured to execute MAC calculation. The pre-fetch circuit pre-fetches at least one column of the first matrix from the storing unit to act as pre-fetch data, pre-fetches at least one row of the second matrix from the storing unit to act as the pre-fetch data, or pre-fetches at least one column of the first matrix and at least one row of the second matrix from the storing unit to act as the pre-fetch data. The control circuit decides whether to perform the MAC calculation on a current column of the first matrix and a current row of the second matrix through the MAC circuit according to the pre-fetch data.Type: GrantFiled: September 28, 2020Date of Patent: December 5, 2023Assignee: NEUCHIPS CORPORATIONInventors: Chiung-Liang Lin, Chao-Yang Kao
-
Patent number: 11615286Abstract: A computing system and a compressing method for neural network parameters are provided. In the method, multiple neural network parameters are obtained. The neural network parameters are used for a neural network algorithm. Every at least two neural network parameters are grouped into an encoding combination. The number of neural network parameters in each encoding combination is the same. The encoding combinations are compressed with the same compression target bit number. Each encoding combination is compressed independently. The compression target bit number is not larger than a bit number of each encoding combination. Thereby, the storage space can be saved and excessive power consumption for accessing the parameters can be prevented.Type: GrantFiled: July 18, 2019Date of Patent: March 28, 2023Assignee: NEUCHIPS CORPORATIONInventors: Youn-Long Lin, Chao-Yang Kao, Huang-Chih Kuo, Chiung-Liang Lin
-
Patent number: 11387843Abstract: A method and apparatus for encoding and decoding of floating-point number is provided. The method for encoding is used to convert at least one original floating-point number to at least one encoded floating-point number. The method for encoding includes: determining a number of exponent bits of the at least one encoded floating-point number and calculating an exponent bias according to at least one original exponent value of the at least one original floating-point number; and converting an original exponent value of a current original floating-point number of the at least one original floating-point number to an encoded exponent value of a current encoded floating-point number of the at least one encoded floating-point number according to the exponent bias.Type: GrantFiled: April 23, 2021Date of Patent: July 12, 2022Assignee: NEUCHIPS CORPORATIONInventors: Juinn Dar Huang, Cheng Wei Huang, Tim Wei Chen, Chiung-Liang Lin
-
Patent number: 11379185Abstract: A matrix multiplication device and an operation method thereof are provided. The matrix multiplication device includes a plurality of unit circuits. Each of the unit circuits includes a multiplying-adding circuit, a first register, and a second register. A first input terminal and a second input terminal of the multiplying-adding circuit are respectively coupled to a corresponding first input line and a corresponding second input line. An input terminal and an output terminal of the first register are respectively coupled to an output terminal and a third input terminal of the multiplying-adding circuit. The second register is coupled to the first register to receive and temporarily store a multiplication accumulation result. Wherein, the second registers of the unit circuits output the multiplication accumulation results in a column direction in a first output mode, and output the multiplication accumulation results in a row direction in a second output mode.Type: GrantFiled: September 21, 2020Date of Patent: July 5, 2022Assignee: NEUCHIPS CORPORATIONInventors: Jian-Wen Chen, Chiung-Liang Lin
-
Patent number: 11307853Abstract: A matrix multiplication device and an operation method thereof are provided. The matrix multiplication device includes calculation circuits, a control circuit, a multiplication circuit, and a routing circuit. The calculation circuits produce multiply-accumulate values. The control circuit receives a plurality of first element values of a first matrix. The control circuit classifies the first element values into at least one classification value. The multiplication circuit multiplies the classification value by a second element value of a second matrix in a low power mode to obtain at least one product value. The routing circuit transmits each of the product values to at least one corresponding calculation circuit in the calculation circuits in the low power mode.Type: GrantFiled: October 29, 2019Date of Patent: April 19, 2022Assignee: NEUCHIPS CORPORATIONInventors: Chiung-Liang Lin, Chao-Yang Kao, Youn-Long Lin, Huang-Chih Kuo, Jian-Wen Chen
-
Publication number: 20220066736Abstract: A matrix multiplication device and an operation method thereof are provided. The matrix multiplication device includes a plurality of unit circuits. Each of the unit circuits includes a multiplying-adding circuit, a first register, and a second register. A first input terminal and a second input terminal of the multiplying-adding circuit are respectively coupled to a corresponding first input line and a corresponding second input line. An input terminal and an output terminal of the first register are respectively coupled to an output terminal and a third input terminal of the multiplying-adding circuit. The second register is coupled to the first register to receive and temporarily store a multiplication accumulation result. Wherein, the second registers of the unit circuits output the multiplication accumulation results in a column direction in a first output mode, and output the multiplication accumulation results in a row direction in a second output mode.Type: ApplicationFiled: September 21, 2020Publication date: March 3, 2022Applicant: NEUCHIPS CORPORATIONInventors: Jian-Wen Chen, Chiung-Liang Lin
-
Publication number: 20220058238Abstract: A matrix calculation device including a storing unit, a multiply accumulate (MAC) circuit, a pre-fetch circuit, and a control circuit, and an operation method thereof are provided. The storing unit stores a first and second matrixes. The MAC circuit is configured to execute MAC calculation. The pre-fetch circuit pre-fetches at least one column of the first matrix from the storing unit to act as pre-fetch data, pre-fetches at least one row of the second matrix from the storing unit to act as the pre-fetch data, or pre-fetches at least one column of the first matrix and at least one row of the second matrix from the storing unit to act as the pre-fetch data. The control circuit decides whether to perform the MAC calculation on a current column of the first matrix and a current row of the second matrix through the MAC circuit according to the pre-fetch data.Type: ApplicationFiled: September 28, 2020Publication date: February 24, 2022Applicant: NEUCHIPS CORPORATIONInventors: Chiung-Liang Lin, Chao-Yang Kao
-
Publication number: 20210064373Abstract: A matrix multiplication device and an operation method thereof are provided. The matrix multiplication device includes calculation circuits, a control circuit, a multiplication circuit, and a routing circuit. The calculation circuits produce multiply-accumulate values. The control circuit receives a plurality of first element values of a first matrix. The control circuit classifies the first element values into at least one classification value. The multiplication circuit multiplies the classification value by a second element value of a second matrix in a low power mode to obtain at least one product value. The routing circuit transmits each of the product values to at least one corresponding calculation circuit in the calculation circuits in the low power mode.Type: ApplicationFiled: October 29, 2019Publication date: March 4, 2021Applicant: NEUCHIPS CORPORATIONInventors: Chiung-Liang Lin, Chao-Yang Kao, Youn-Long Lin, Huang-Chih Kuo, Jian-Wen Chen
-
Publication number: 20200372320Abstract: A computing system and a compressing method for neural network parameters are provided. In the method, multiple neural network parameters are obtained. The neural network parameters are used for a neural network algorithm. Every at least two neural network parameters are grouped into an encoding combination. The number of neural network parameters in each encoding combination is the same. The encoding combinations are compressed with the same compression target bit number. Each encoding combination is compressed independently. The compression target bit number is not larger than a bit number of each encoding combination. Thereby, the storage space can be saved and excessive power consumption for accessing the parameters can be prevented.Type: ApplicationFiled: July 18, 2019Publication date: November 26, 2020Applicant: NEUCHIPS CORPORATIONInventors: Youn-Long Lin, Chao-Yang Kao, Huang-Chih Kuo, Chiung-Liang Lin
-
Patent number: 10217394Abstract: A display driving apparatus including a pixel reorder circuit, an image processing circuit and a driver circuit is provided. The pixel reorder circuit is configured to reorder pixels of frame data. The frame data includes previous frame data. The image processing circuit is coupled to the pixel reorder circuit. The image processing circuit is configured to perform an image processing operation on the frame data that the pixels have been reordered. The driver circuit is coupled to the pixel reorder circuit. The driver circuit is configured to drive a display according to the previous frame data that pixels have been reordered and the current frame data. Each of the pixels of the frame data includes a first sub-pixel set and a second sub-pixel set. In addition, a display driving method is also provided.Type: GrantFiled: September 30, 2016Date of Patent: February 26, 2019Assignee: Novatek Microelectronics Corp.Inventors: Wenhui Yu, Chao-Yang Kao, Chiung-Liang Lin
-
Publication number: 20180082628Abstract: A display driving apparatus including a pixel reorder circuit, an image processing circuit and a driver circuit is provided. The pixel reorder circuit is configured to reorder pixels of frame data. The frame data includes previous frame data. The image processing circuit is coupled to the pixel reorder circuit. The image processing circuit is configured to perform an image processing operation on the frame data that the pixels have been reordered. The driver circuit is coupled to the pixel reorder circuit. The driver circuit is configured to drive a display according to the previous frame data that pixels have been reordered and the current frame data. Each of the pixels of the frame data includes a first sub-pixel set and a second sub-pixel set. In addition, a display driving method is also provided.Type: ApplicationFiled: September 30, 2016Publication date: March 22, 2018Applicant: Novatek Microelectronics Corp.Inventors: Wenhui Yu, Chao-Yang Kao, Chiung-Liang Lin
-
Patent number: 9343023Abstract: A stereoscopic display and a driving method are disclosed herein. The stereoscopic display includes a sensor, a barrier cell, and a control unit. The sensor is configured to detect a user to generate a sensing signal. The barrier cell is configured to generate a 3D image with a 2D image. The barrier cell includes barrier pitches disposed in parallel. Each of the barrier pitches includes switchable barrier units. The control unit is configured to generate control signals to adjust the switchable barrier units according to the sensing signal, so as to make at least one of the switchable barrier units of each of barrier pitches form a shading zone, to make the switchable barrier units disposed at the two adjacent sides of the shading zone form a gray level zone, and to make the rest of the switchable barrier units in the same barrier pitch form a photic zone.Type: GrantFiled: April 22, 2014Date of Patent: May 17, 2016Assignee: AU OPTRONICS CORPORATIONInventors: Chiung-Liang Lin, Hsuan-I Wu, Ching-Tsun Chang, Jeng-Yi Huang
-
Patent number: 8982047Abstract: At least one characteristic of an object is captured at a first instant and the at least one characteristic of the object is then captured at a second instant. A moving direction and a moving speed of the object are calculated according to the at least one characteristic of the object captured respectively at the first instant and the second instant. A left view image and a right view image are projected to the object and if the moving speed of the object is greater than a threshold, a center point of the left view image and the right view image deviates from a center line of the object.Type: GrantFiled: February 4, 2013Date of Patent: March 17, 2015Assignee: AU Optronics Corp.Inventors: Chiung-Liang Lin, Ching-Tsun Chang, Tien-Chien Liao
-
Publication number: 20150054860Abstract: A stereoscopic display and a driving method are disclosed herein. The stereoscopic display includes a sensor, a barrier cell, and a control unit. The sensor is configured to detect a user to generate a sensing signal. The barrier cell is configured to generate a 3D image with a 2D image. The barrier cell includes barrier pitches disposed in parallel. Each of the barrier pitches includes switchable barrier units. The control unit is configured to generate control signals to adjust the switchable barrier units according to the sensing signal, so as to make at least one of the switchable barrier units of each of barrier pitches form a shading zone, to make the switchable barrier units disposed at the two adjacent sides of the shading zone form a gray level zone, and to make the rest of the switchable barrier units in the same barrier pitch form a photic zone.Type: ApplicationFiled: April 22, 2014Publication date: February 26, 2015Applicant: AU Optronics CorporationInventors: Chiung-Liang LIN, Hsuan-I WU, Ching-Tsun CHANG, Jeng-Yi HUANG
-
Publication number: 20140085182Abstract: At least one characteristic of an object is captured at a first instant and the at least one characteristic of the object is then captured at a second instant. A moving direction and a moving speed of the object are calculated according to the at least one characteristic of the object captured respectively at the first instant and the second instant. A left view image and a right view image are projected to the object and if the moving speed of the object is greater than a threshold, a center point of the left view image and the right view image deviates from a center line of the object.Type: ApplicationFiled: February 4, 2013Publication date: March 27, 2014Applicant: AU OPTRONICS CORP.Inventors: Chiung-Liang Lin, Ching-Tsun Chang, Tien-Chien Liao