Patents by Inventor Chiung-tung Li

Chiung-tung Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Robust manufacturing method for making a III-V compound semiconductor device by misaligned wafer bonding
    Patent number: 6333208
    Abstract: A first III-V semiconductor wafer is bonded to a second III-V semiconductor wafer, e.g. by thermal fusion. The {110} crystal plane of the III-V semiconductor wafer is displaced angularly relative to the {110} crystal plane of the second III-V semiconductor wafer. Because of this, the tendency of the bonded wafer to break is reduced and many backside processes can be moved to front side and results in a robust device manufacturing process.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: December 25, 2001
    Inventor: Chiung-tung Li