Patents by Inventor Chiung Wen Hsu

Chiung Wen Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210276957
    Abstract: The present disclosure relates to a compound of Formula I, or a geometric isomer, enantiomer, diastereomer, racemate, atropisomer, pharmaceutically acceptable salt, prodrug or solvate thereof. The present disclosure further relates to a composition comprising the compound of Formula (I). The compound and the composition described herein can be used to inhibit NADPH oxidase activity.
    Type: Application
    Filed: June 20, 2019
    Publication date: September 9, 2021
    Applicant: TAIWANJ PHARMACEUTICALS CO., LTD.
    Inventors: Syaulan S. YANG, Kuang Yuan LEE, Meng Hsien LIU, Yan-Feng JIANG, Yu-Shiou FAN, Chiung Wen WANG, Mei-Chi HSU
  • Publication number: 20210274674
    Abstract: A server system comprises a deck, a front panel arranged on the deck and defining a collecting space; two doors arranged on opposite sides of the deck, and being perpendicular to the front panel; two receiving frame structures arranged between the doors in a back to back arrangement, and configured to receive multiple rows and columns of a plurality of storage drives horizontally, wherein two periphery corridors are each defined between one of the doors and one of the receiving frame structure facing the one door; two circuit boards arranged between the two receiving frame structures, wherein the two circuit boards comprise a plurality of slits, wherein a central corridor is defined between the two circuit boards; a storage cover disposed above the deck over the two periphery corridors, the central corridor, the two receiving frame structures, and the two circuit boards.
    Type: Application
    Filed: May 19, 2021
    Publication date: September 2, 2021
    Inventors: CHIEN-WEN WANG, HAN-CHUNG CHIEN, SHENG-CHAN LIN, HAO-HSIANG HSU, CHIUNG-WEI LIN, AN-HSIN CHEN
  • Publication number: 20210257484
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Application
    Filed: May 3, 2021
    Publication date: August 19, 2021
    Inventors: Chia-Wei CHANG, Chiung Wen HSU, Yu-Ting WENG
  • Patent number: 10998427
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: May 4, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Wei Chang, Chiung Wen Hsu, Yu-Ting Weng
  • Patent number: 10758603
    Abstract: Disclosed is a composition for preventing and treating a Mycoplasma hyorhinis infection in swine. The composition uses XylF, DnaK, P72, or a combination thereof as an active pharmaceutical ingredient. Further disclosed are an expression vector and a method for producing the active pharmaceutical ingredient of the composition using a prokaryotic expression system.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: September 1, 2020
    Assignee: Agricultural Technology Research Institute
    Inventors: Jiunn-Horng Lin, Zeng-Weng Chen, Jyh-Perng Wang, Chiung-Wen Hsu, Weng-Zeng Huang, Ming-Wei Hsieh, Tzu-Ting Peng, Shih-Ling Hsuan
  • Publication number: 20200176322
    Abstract: A semiconductor device and method for forming the semiconductor device are provided. A first layer is formed over a semiconductor layer, and a first patterned mask is formed over the first layer. A cyclic etch process is then performed to define a second patterned mask in the first layer. The cyclic etch process includes a first phase to form a polymer layer over the first patterned mask and a second phase to remove the polymer layer and to remove a portion of the first layer. A portion of the semiconductor layer is removed using the second patterned mask to define a fin from the semiconductor layer.
    Type: Application
    Filed: November 13, 2019
    Publication date: June 4, 2020
    Inventors: Fo-Ju LIN, Chia-Wei CHANG, Chiung Wen HSU
  • Publication number: 20200023048
    Abstract: Disclosed is a composition for preventing and treating a Mycoplasma hyorhinis infection in swine. The composition uses XylF, DnaK, P72, or a combination thereof as an active pharmaceutical ingredient. Further disclosed are an expression vector and a method for producing the active pharmaceutical ingredient of the composition using a prokaryotic expression system.
    Type: Application
    Filed: August 9, 2016
    Publication date: January 23, 2020
    Inventors: Jiunn-Horng LIN, Zeng-Weng CHEN, Jyh-Perng WANG, Chiung-Wen HSU, Weng-Zeng HUANG, Ming-Wei HSIEH, Tzu-Ting PENG, Shih-Ling HSUAN
  • Publication number: 20190371922
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Application
    Filed: August 19, 2019
    Publication date: December 5, 2019
    Inventors: Chia-Wei CHANG, Chiung Wen HSU, Yu-Ting WENG
  • Patent number: 10388763
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: August 20, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Wei Chang, Chiung Wen Hsu, Yu-Ting Weng
  • Publication number: 20180175173
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Application
    Filed: October 5, 2017
    Publication date: June 21, 2018
    Inventors: Chia-Wei CHANG, Chiung Wen Hsu, Yu-Ting WENG
  • Patent number: 9040317
    Abstract: A method includes performing a patterning step on a layer using a process gas. When the patterning step is performed, a signal strength is monitored, wherein the signal strength is from an emission spectrum of a compound generated from the patterning step. The compound includes an element in the patterned layer. At a time the signal strength is reduced to a pre-determined threshold value, the patterning step is stopped.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: May 26, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keng-Ying Liao, Szu-Hung Yang, Chiung Wen Hsu
  • Publication number: 20130252355
    Abstract: A method includes performing a patterning step on a layer using a process gas. When the patterning step is performed, a signal strength is monitored, wherein the signal strength is from an emission spectrum of a compound generated from the patterning step. The compound includes an element in the patterned layer. At a time the signal strength is reduced to a pre-determined threshold value, the patterning step is stopped.
    Type: Application
    Filed: March 23, 2012
    Publication date: September 26, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keng-Ying Liao, Szu-Hung Yang, Chiung Wen Hsu