Patents by Inventor Chiung Wen Hsu

Chiung Wen Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240055526
    Abstract: A semiconductor device and a method of fabricating a semiconductor device are provided herein. The semiconductor device includes a substrate; a fin structure arranged on the substrate and including a ridge portion and a bottom portion between the ridge portion and the substrate, wherein the ridge portion comprises a channel region and a fin region between the channel region and the bottom portion, a critical dimension of the bottom portion in a cross-fin direction is gradually increased toward the substrate to twice or more of a critical dimension of the channel region in the cross-fin direction; a metal gate structure disposed on the fin structure extending the cross-fin direction; and an epitaxy region disposed beside the metal gate structure in a lengthwise direction of the fin structure and connected to the fin structure.
    Type: Application
    Filed: August 11, 2022
    Publication date: February 15, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chi LIN, Yu-Ting WENG, Chiung Wen Hsu, Chao-Cheng Chen
  • Publication number: 20220301922
    Abstract: A device includes a substrate, a first fin, a second fin, a first isolation structure, a second isolation structure, and a gate structure. The first fin extends from a p-type region of the substrate. The second fin extends from an n-type region of the substrate. The first isolation structure is over the p-type region and adjacent to the first fin. The first isolation structure has a bottom surface and opposite first and second sidewalls connected to the bottom surface, a first round corner is between the bottom surface and the first sidewall of the first isolation structure, and the first sidewall is substantially parallel to the second sidewall. The second isolation structure is over the n-type region and adjacent to the first fin. The first isolation structure is deeper than the second isolation structure. The gate structure is over the first isolation structure and covering the first fin.
    Type: Application
    Filed: July 9, 2021
    Publication date: September 22, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsien-Chung HUANG, Chiung-Wen HSU, Mei-Ju KUO, Yu-Ting WENG, Yu-Chi LIN, Ting-Chung WANG, Chao-Cheng CHEN
  • Patent number: 11177177
    Abstract: A semiconductor device and method for forming the semiconductor device are provided. A first layer is formed over a semiconductor layer, and a first patterned mask is formed over the first layer. A cyclic etch process is then performed to define a second patterned mask in the first layer. The cyclic etch process includes a first phase to form a polymer layer over the first patterned mask and a second phase to remove the polymer layer and to remove a portion of the first layer. A portion of the semiconductor layer is removed using the second patterned mask to define a fin from the semiconductor layer.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: November 16, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Fo-Ju Lin, Chia-Wei Chang, Chiung Wen Hsu
  • Publication number: 20210257484
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Application
    Filed: May 3, 2021
    Publication date: August 19, 2021
    Inventors: Chia-Wei CHANG, Chiung Wen HSU, Yu-Ting WENG
  • Patent number: 10998427
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: May 4, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Wei Chang, Chiung Wen Hsu, Yu-Ting Weng
  • Patent number: 10758603
    Abstract: Disclosed is a composition for preventing and treating a Mycoplasma hyorhinis infection in swine. The composition uses XylF, DnaK, P72, or a combination thereof as an active pharmaceutical ingredient. Further disclosed are an expression vector and a method for producing the active pharmaceutical ingredient of the composition using a prokaryotic expression system.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: September 1, 2020
    Assignee: Agricultural Technology Research Institute
    Inventors: Jiunn-Horng Lin, Zeng-Weng Chen, Jyh-Perng Wang, Chiung-Wen Hsu, Weng-Zeng Huang, Ming-Wei Hsieh, Tzu-Ting Peng, Shih-Ling Hsuan
  • Publication number: 20200176322
    Abstract: A semiconductor device and method for forming the semiconductor device are provided. A first layer is formed over a semiconductor layer, and a first patterned mask is formed over the first layer. A cyclic etch process is then performed to define a second patterned mask in the first layer. The cyclic etch process includes a first phase to form a polymer layer over the first patterned mask and a second phase to remove the polymer layer and to remove a portion of the first layer. A portion of the semiconductor layer is removed using the second patterned mask to define a fin from the semiconductor layer.
    Type: Application
    Filed: November 13, 2019
    Publication date: June 4, 2020
    Inventors: Fo-Ju LIN, Chia-Wei CHANG, Chiung Wen HSU
  • Publication number: 20200023048
    Abstract: Disclosed is a composition for preventing and treating a Mycoplasma hyorhinis infection in swine. The composition uses XylF, DnaK, P72, or a combination thereof as an active pharmaceutical ingredient. Further disclosed are an expression vector and a method for producing the active pharmaceutical ingredient of the composition using a prokaryotic expression system.
    Type: Application
    Filed: August 9, 2016
    Publication date: January 23, 2020
    Inventors: Jiunn-Horng LIN, Zeng-Weng CHEN, Jyh-Perng WANG, Chiung-Wen HSU, Weng-Zeng HUANG, Ming-Wei HSIEH, Tzu-Ting PENG, Shih-Ling HSUAN
  • Publication number: 20190371922
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Application
    Filed: August 19, 2019
    Publication date: December 5, 2019
    Inventors: Chia-Wei CHANG, Chiung Wen HSU, Yu-Ting WENG
  • Patent number: 10388763
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: August 20, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Wei Chang, Chiung Wen Hsu, Yu-Ting Weng
  • Publication number: 20180175173
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Application
    Filed: October 5, 2017
    Publication date: June 21, 2018
    Inventors: Chia-Wei CHANG, Chiung Wen Hsu, Yu-Ting WENG
  • Patent number: 9040317
    Abstract: A method includes performing a patterning step on a layer using a process gas. When the patterning step is performed, a signal strength is monitored, wherein the signal strength is from an emission spectrum of a compound generated from the patterning step. The compound includes an element in the patterned layer. At a time the signal strength is reduced to a pre-determined threshold value, the patterning step is stopped.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: May 26, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keng-Ying Liao, Szu-Hung Yang, Chiung Wen Hsu
  • Publication number: 20130252355
    Abstract: A method includes performing a patterning step on a layer using a process gas. When the patterning step is performed, a signal strength is monitored, wherein the signal strength is from an emission spectrum of a compound generated from the patterning step. The compound includes an element in the patterned layer. At a time the signal strength is reduced to a pre-determined threshold value, the patterning step is stopped.
    Type: Application
    Filed: March 23, 2012
    Publication date: September 26, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keng-Ying Liao, Szu-Hung Yang, Chiung Wen Hsu