Abstract: A current sense short protection circuit includes a switch unit, a current sensing unit, a detection circuit and a short detection module. The first terminal of the switch unit receives a first voltage. The control terminal of the switch unit receives a control signal. The first terminal of the current sensing unit is coupled to the second terminal of the switch unit. The second terminal of the current sensing unit receives a second voltage. The detection unit receives the second voltage and a third voltage provided by the first terminal of the current sensing unit, and generates a detection signal according to the second voltage and the third voltage. The short detection module receives the first voltage, the second voltage and the detection signal, and generates a short detection signal according to the first voltage, the second voltage and the detection signal.

Abstract: A current sense short protection circuit includes a switch unit, a current sensing unit, a detection circuit and a short detection module. The first terminal of the switch unit receives a first voltage. The control terminal of the switch unit receives a control signal. The first terminal of the current sensing unit is coupled to the second terminal of the switch unit. The second terminal of the current sensing unit receives a second voltage. The detection unit receives the second voltage and a third voltage provided by the first terminal of the current sensing unit, and generates a detection signal according to the second voltage and the third voltage. The short detection module receives the first voltage, the second voltage and the detection signal, and generates a short detection signal according to the first voltage, the second voltage and the detection signal.

Abstract: An error-correcting method used in decoding data transmission is disclosed. The error-correcting method is used for analyzing an error receiving data received from a receiving terminal and comprises: providing a first calculating formula for manipulation of the receiving data to generate the first sum; providing a second calculating formula for manipulation of the receiving data to generate the second sum; identifying the error position of the receiving data according to the result of dividing the second sum by the first sum.

Abstract: A method for generating error detection code is disclosed. Firstly, a first error detection code PEDC is derived by using 12-byte unknown sector data information including ID, IED, RSV and the 2048-byte main data while the main data is delivered from a host. Secondly, a second error detection code MEDC is obtained by using known 12-byte sector data information including ID, IED, RSV and the 2048-byte main data. Thereafter, the real error detection code EDC is obtained by applying an exclusive-OR operation to both the PEDC and MEDC.

Abstract: A power supply of a video and audio system is coupled to a first switch and a second switch. A power management unit is coupled between the first switch and at least one electronic device. An integrated circuit includes a first circuit and a second circuit. The first circuit is coupled to the power management unit and the at least one electronic device for controlling the operation of the at least one electronic device. The second circuit is coupled to a battery, the first switch, the second switch, and the first circuit for controlling the first switch and the second switch.

Abstract: A power supply of a video and audio system is coupled to a first switch and a second switch. A power management unit is coupled between the first switch and at least one electronic device. An integrated circuit includes a first circuit and a second circuit. The first circuit is coupled to the power management unit and the at least one electronic device for controlling the operation of the at least one electronic device. The second circuit is coupled to a battery, the first switch, the second switch, and the first circuit for controlling the first switch and the second switch.

Abstract: A power supply of a video and audio system is coupled to a first switch and a second switch. A power management unit is coupled between the first switch and at least one electronic device. An integrated circuit includes a first circuit and a second circuit. The first circuit is coupled to the power management unit and the at least one electronic device for controlling the operation of the at least one electronic device. The second circuit is coupled to a battery, the first switch, the second switch, and the first circuit for controlling the first switch and the second switch.

Abstract: An error-correcting method used in decoding data transmission is disclosed. The error-correcting method is used for analyzing an error receiving data received from a receiving terminal and comprises: providing a first calculating formula for manipulation of the receiving data to generate the first sum; providing a second calculating formula for manipulation of the receiving data to generate the second sum; identifying the error position of the receiving data according to the result of dividing the second sum by the first sum.

Abstract: A method for generating error detection code is disclosed. Firstly, a first error detection code PEDC is derived by using 12-byte unknown sector data information including ID, IED, RSV and the 2048-byte main data while the main data is delivered from a host. Secondly, a second error detection code MEDC is obtained by using known 12-byte sector data information including ID, IED, RSV and the 2048-byte main data. Thereafter, the real error detection code EDC is obtained by applying an exclusive-OR operation to both the PEDC and MEDC.

Abstract: A method for generating error detection code is disclosed. Firstly, a first error detection code PEDC is derived by using 12-byte unknown sector data information including ID, IED, RSV and the 2048-byte main data while the main data is delivered from a host. Secondly, a second error detection code MEDC is obtained by using known 12-byte sector data information including ID, IED, RSV and the 2048-byte main data. Thereafter, the real error detection code EDC is obtained by applying an exclusive-OR operation to both the PEDC and MEDC.

Abstract: A method for generating parity codes of a data sector having data information and main data. The main data is scrambled to generating outer-code parity. The main data is scrambled to generating inner-code parity. The outer-code parity generating is superior to the inner-code parity generating. The outer-code parity is generated by vertically scrambling the corresponding vertical data block.

Abstract: A power supply of a video and audio system is coupled to a first switch and a second switch. A power management unit is coupled between the first switch and at least one electronic device. An integrated circuit includes a first circuit and a second circuit. The first circuit is coupled to the power management unit and the at least one electronic device for controlling the operation of the at least one electronic device. The second circuit is coupled to a battery, the first switch, the second switch, and the first circuit for controlling the first switch and the second switch.

Abstract: A scrambling method for generating recording data onto a disc includes vertically scrambling main data, which is stored in DRAM, to generate PO, wherein the scrambled data due to generate PO is not stored in DRAM; then scrambling data again to generate PI; the scrambled data due to generating PI adds with ID, IED, RSV, EDC, PI, and PO, arranging in orders and recording onto a disc.

Abstract: A method for generating parity codes of a data sector having data information and main data. The main data is scrambled to generating outer-code parity. The main data is scrambled to generating inner-code parity. The outer-code parity generating is superior to the inner-code parity generating. The outer-code parity is generated by vertically scrambling the corresponding vertical data block.

Abstract: A method for generating error detection code is disclosed. Firstly, a first error detection code PEDC is derived by using 12-byte unknown sector data information including ID, IED, RSV and the 2048-byte main data while the main data is delivered from a host. Secondly, a second error detection code MEDC is obtained by using known 12-byte sector data information including ID, IED, RSV and the 2048-byte main data. Thereafter, the real error detection code EDC is obtained by applying an exclusive-OR operation to both the PEDC and MEDC.

Abstract: A scrambling method for generating recording data onto a disc includes vertically scrambling main data, which is stored in DRAM, to generate PO, wherein the scrambled data due to generate PO is not stored in DRAM; then scrambling data again to generate PI; the scrambled data due to generating PI adds with ID, IED, RSV, EDC, PI, and PO, arranging in orders and recording onto a disc.