Abstract: A method is disclosed that includes the operation below. Vertices in a conflict graph are sorted into a first clique and a second clique, in which the conflict graph corresponds to a layout of a circuit. A first vertex of the vertices is merged with a second vertex of the vertices, to generate a reduced graph, in which the first clique excludes the second vertex, and the second clique excludes the first vertex. A first color pattern of a plurality of color patterns is assigned to a first pattern, corresponding to the first vertex, and a second pattern, corresponding to the second vertex, in the layout according to the reduced graph.

Abstract: A method is disclosed that includes the operation below. Vertices in a conflict graph are sorted into a first clique and a second clique, in which the conflict graph corresponds to a layout of a circuit. A first vertex of the vertices is merged with a second vertex of the vertices, to generate a reduced graph, in which the first clique excludes the second vertex, and the second clique excludes the first vertex. A first color pattern of a plurality of color patterns is assigned to a first pattern, corresponding to the first vertex, and a second pattern, corresponding to the second vertex, in the layout according to the reduced graph.

Abstract: A method comprises selecting a region from a layout pattern of an integrated circuit, wherein the region comprises a plurality of functional units, and wherein the functional units are not coupled to each other through a variety of connection components, identifying hot spots in the region using a first threshold and inserting a plurality of decoupling capacitors adjacent to the hot spots.

Abstract: A method comprises selecting a region from a layout pattern of an integrated circuit, wherein the region comprises a plurality of functional units, and wherein the functional units are not coupled to each other through a variety of connection components, identifying hot spots in the region using a first threshold and inserting a plurality of decoupling capacitors adjacent to the hot spots.

Abstract: A printable photovoltaic electrochromic device is provided. The device includes a transparent substrate, at least one thin-film solar cell on the transparent substrate, at least one single polarity electrochromic (EC) thin film, wherein the single polarity electrochromic thin film includes a single polarity electrochromic material and a polyelectrolyte. The thin-film solar cell at least includes an anode layer, a cathode layer, and a photoelectric conversion layer between the anode layer and cathode layer, wherein a portion of the anode layer or a portion of the cathode layer is exposed from the thin-film solar cell. The single polarity electrochromic thin film covers and contacts with both the cathode layer and the anode layer.

Abstract: A system and method for characterizing process variations are provided. A circuit comprises a plurality of inverters arranged in a sequential loop, and a plurality of transmission gates, with each transmission gate coupled between a pair of serially arranged inverters. Each transmission gate comprises a first field effect transistor (FET) having a first channel, and a second FET having a second channel. The first channel and the second channel are coupled in parallel and a gate terminal of the first FET and a gate terminal of the second FET are coupled to a first control signal and a second control signal, respectively.

Abstract: A printable photovoltaic electrochromic device is provided. The device includes a transparent substrate, at least one thin-film solar cell on the transparent substrate, at least one single polarity electrochromic (EC) thin film, wherein the single polarity electrochromic thin film includes a single polarity electrochromic material and a polyelectrolyte. The thin-film solar cell at least includes an anode layer, a cathode layer, and a photoelectric conversion layer between the anode layer and cathode layer, wherein a portion of the anode layer or a portion of the cathode layer is exposed from the thin-film solar cell. The single polarity electrochromic thin film covers and contacts with both the cathode layer and the anode layer.

Abstract: A system and method for characterizing process variations are provided. A circuit comprises a plurality of inverters arranged in a sequential loop, and a plurality of transmission gates, with each transmission gate coupled between a pair of serially arranged inverters. Each transmission gate comprises a first field effect transistor (FET) having a first channel, and a second FET having a second channel. The first channel and the second channel are coupled in parallel and a gate terminal of the first FET and a gate terminal of the second FET are coupled to a first control signal and a second control signal, respectively.