Patents by Inventor Chiwon Cho

Chiwon Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device having contact plugs
    Patent number: 10431586
    Abstract: A semiconductor device including a first fin active area substantially parallel to a second fin active area, a first source/drain in the first fin active area, a second source/drain in the second fin active area, a first contact plug on the first source/drain, and a second contact plug on the second source/drain. The center of the second contact plug is offset from the center of the second source/drain.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: October 1, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Changseop Yoon, Sungmin Kim, Chiwon Cho
  • SEMICONDUCTOR DEVICE HAVING CONTACT PLUGS
    Publication number: 20190148379
    Abstract: A semiconductor device including a first fin active area substantially parallel to a second fin active area, a first source/drain in the first fin active area, a second source/drain in the second fin active area, a first contact plug on the first source/drain, and a second contact plug on the second source/drain. The center of the second contact plug is offset from the center of the second source/drain.
    Type: Application
    Filed: January 10, 2019
    Publication date: May 16, 2019
    Inventors: Changseop YOON, Sungmin KIM, Chiwon CHO
  • Semiconductor device having contact plugs and method of forming the same
    Patent number: 10229911
    Abstract: A semiconductor device including a first fin active area substantially parallel to a second fin active area, a first source/drain in the first fin active area, a second source/drain in the second fin active area, a first contact plug on the first source/drain, and a second contact plug on the second source/drain. The center of the second contact plug is offset from the center of the second source/drain.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: March 12, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Changseop Yoon, Sungmin Kim, Chiwon Cho
  • SEMICONDUCTOR DEVICE HAVING CONTACT PLUGS AND METHOD OF FORMING THE SAME
    Publication number: 20170352664
    Abstract: A semiconductor device including a first fin active area substantially parallel to a second fin active area, a first source/drain in the first fin active area, a second source/drain in the second fin active area, a first contact plug on the first source/drain, and a second contact plug on the second source/drain. The center of the second contact plug is offset from the center of the second source/drain.
    Type: Application
    Filed: August 24, 2017
    Publication date: December 7, 2017
    Inventors: Changseop YOON, Sungmin KIM, Chiwon CHO
  • Semiconductor device having contact plugs and method of forming the same
    Patent number: 9748243
    Abstract: A semiconductor device including a first fin active area substantially parallel to a second fin active area, a first source/drain in the first fin active area, a second source/drain in the second fin active area, a first contact plug on the first source/drain, and a second contact plug on the second source/drain. The center of the second contact plug is offset from the center of the second source/drain.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: August 29, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Changseop Yoon, Sungmin Kim, Chiwon Cho
  • SEMICONDUCTOR DEVICE HAVING CONTACT PLUGS AND METHOD OF FORMING THE SAME
    Publication number: 20160315086
    Abstract: A semiconductor device including a first fin active area substantially parallel to a second fin active area, a first source/drain in the first fin active area, a second source/drain in the second fin active area, a first contact plug on the first source/drain, and a second contact plug on the second source/drain. The center of the second contact plug is offset from the center of the second source/drain.
    Type: Application
    Filed: February 22, 2016
    Publication date: October 27, 2016
    Inventors: Changseop YOON, Sungmin KIM, Chiwon CHO
  • Fin field effect transistors including multiple lattice constants and methods of fabricating the same
    Patent number: 9252274
    Abstract: A Field Effect Transistor (FET) structure may include a fin on a substrate having a first lattice constant and at least two different lattice constant layers on respective different axially oriented surfaces of the fin, wherein the at least two different lattice constant layers each comprise lattice constants that are different than the first lattice constant and each other.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: February 2, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung Gil Kang, Changwoo Oh, Heedon Jeong, Chiwon Cho
  • FIN FIELD EFFECT TRANSISTORS INCLUDING MULTIPLE LATTICE CONSTANTS AND METHODS OF FABRICATING THE SAME
    Publication number: 20150108545
    Abstract: A Field Effect Transistor (FET) structure may include a fin on a substrate having a first lattice constant and at least two different lattice constant layers on respective different axially oriented surfaces of the fin, wherein the at least two different lattice constant layers each comprise lattice constants that are different than the first lattice constant and each other.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 23, 2015
    Inventors: Myung Gil Kang, Changwoo Oh, Heedon Jeong, Chiwon Cho
  • Fin field effect transistors including multiple lattice constants and methods of fabricating the same
    Patent number: 8941155
    Abstract: A Field Effect Transistor (FET) structure may include a fin on a substrate having a first lattice constant and at least two different lattice constant layers on respective different axially oriented surfaces of the fin, wherein the at least two different lattice constant layers each comprise lattice constants that are different than the first lattice constant and each other.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: January 27, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung Gil Kang, Changwoo Oh, Heedon Jeong, Chiwon Cho
  • FIN FIELD EFFECT TRANSISTORS INCLUDING MULTIPLE LATTICE CONSTANTS AND METHODS OF FABRICATING THE SAME
    Publication number: 20130234204
    Abstract: A Field Effect Transistor (FET) structure may include a fin on a substrate having a first lattice constant and at least two different lattice constant layers on respective different axially oriented surfaces of the fin, wherein the at least two different lattice constant layers each comprise lattice constants that are different than the first lattice constant and each other.
    Type: Application
    Filed: September 14, 2012
    Publication date: September 12, 2013
    Inventors: Myung Gil Kang, Changwoo Oh, Heedon Jeong, Chiwon Cho