Patents by Inventor Chiyu Zhu

Chiyu Zhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096633
    Abstract: The disclosure relates to methods of selectively depositing material comprising a group 3 to 6 transition metal on a first surface of a substrate relative to a second surface of the substrate by a cyclic deposition process. The method includes providing a substrate in a reaction chamber, providing a transition metal precursor into the reaction chamber in a vapor phase, wherein the transition metal precursor comprises an aromatic ligand and providing a second precursor into the reaction chamber in a vapor phase to deposit transition metal on the first surface of the substrate. The disclosure further relates to a transition metal layers, and to deposition assemblies.
    Type: Application
    Filed: September 13, 2023
    Publication date: March 21, 2024
    Inventors: Elina Färm, Jan Willem Maes, Charles Dezelah, Shinya Iwashita, Arpita Saha, Eva Tois, Marko Tuominen, Janne-Petteri Niemelä, Patricio Eduardo Romero, Chiyu Zhu, Glen Wilk, Holger Saare, YoungChol Byun, Jonahtan Bakke
  • Publication number: 20240096711
    Abstract: A method for forming a semiconductor device structure is disclosure. The method may include, depositing an NMOS gate dielectric and a PMOS gate dielectric over a semiconductor substrate, depositing a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric, removing the first work function metal over the PMOS gate dielectric, and depositing a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. Semiconductor device structures including desired metal gate electrodes deposited by the methods of the disclosure are also disclosed.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Qi Xie, Chiyu Zhu, Kiran Shrestha, Pauline Calka, Oreste Madia, Jan Willem Maes, Michael Eugene Givens
  • Patent number: 11908736
    Abstract: Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process are disclosed. The methods may include: providing a substrate comprising a dielectric surface into a reaction chamber; depositing a nucleation film directly on the dielectric surface; and depositing a molybdenum metal film directly on the nucleation film, wherein depositing the molybdenum metal film includes: contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor; and contacting the substrate with a second vapor phase reactant comprising a reducing agent precursor. Semiconductor device structures including a molybdenum metal film disposed over a surface of a dielectric material with an intermediate nucleation film are also disclosed.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: February 20, 2024
    Assignee: ASM IP Holding B.V.
    Inventors: Bhushan Zope, Kiran Shrestha, Shankar Swaminathan, Chiyu Zhu, Henri Jussila, Qi Xie
  • Publication number: 20240026548
    Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.
    Type: Application
    Filed: July 10, 2023
    Publication date: January 25, 2024
    Inventors: Tom E. Blomberg, Varun Sharma, Suvi Haukka, Marko Tuominen, Chiyu Zhu
  • Patent number: 11854876
    Abstract: Systems and methods are described for depositing a TiN liner layer and a cobalt seed layer on a semiconductor wafer in a cobalt metallization process. In some embodiments the wafer is cooled after deposition of the TiN liner layer and/or the cobalt seed layer. In some embodiments the TiN liner layer and cobalt seed layer are deposited in process modules that are part of a semiconductor processing apparatus that also includes one or more modules for cooling the substrate. In some embodiments the cobalt seed layer may comprise a mixture of TiN and cobalt, a nanolaminate of TiN and cobalt layers or a graded TiN/Co layer.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: December 26, 2023
    Assignee: ASM IP Holding B.V.
    Inventors: Chiyu Zhu, Shinya Iwashita, Jan Willem Maes, Jiyeon Kim
  • Publication number: 20230374671
    Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.
    Type: Application
    Filed: July 24, 2023
    Publication date: November 23, 2023
    Inventors: Tom E. Blomberg, Varun Sharma, Suvi Haukka, Marko Tuominen, Chiyu Zhu
  • Publication number: 20230360964
    Abstract: A method for depositing a film to form an air gap within a semiconductor device is disclosed. An exemplary method comprises pulsing a metal halide precursor onto the substrate and pulsing an oxygen precursor onto a selective deposition surface. The method can be used to form an air gap to, for example, reduce a parasitic resistance of the semiconductor device.
    Type: Application
    Filed: June 28, 2023
    Publication date: November 9, 2023
    Inventor: Chiyu Zhu
  • Publication number: 20230352556
    Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.
    Type: Application
    Filed: July 3, 2023
    Publication date: November 2, 2023
    Inventors: Chiyu Zhu, Kiran Shrestha, Petri Raisanen, Michael Eugene Givens
  • Patent number: 11749562
    Abstract: A method for depositing a film to form an air gap within a semiconductor device is disclosed. An exemplary method comprises pulsing a metal halide precursor onto the substrate and pulsing an oxygen precursor onto a selective deposition surface. The method can be used to form an air gap to, for example, reduce a parasitic resistance of the semiconductor device.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: September 5, 2023
    Assignee: ASM IP Holding B.V.
    Inventor: Chiyu Zhu
  • Patent number: 11739427
    Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: August 29, 2023
    Assignee: ASM IP HOLDING B.V.
    Inventors: Tom E. Blomberg, Varun Sharma, Suvi Haukka, Marko Tuominen, Chiyu Zhu
  • Patent number: 11739428
    Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: August 29, 2023
    Assignee: ASM IP HOLDING B.V.
    Inventors: Tom E. Blomberg, Varun Sharma, Suvi Haukka, Marko Tuominen, Chiyu Zhu
  • Publication number: 20230260784
    Abstract: Methods for forming a doped metal oxide film on a substrate by cyclical deposition are provided. In some embodiments, methods may include contacting the substrate with a first reactant comprising a metal halide source, contacting the substrate with a second reactant comprising a hydrogenated source and contacting the substrate with a third reactant comprising an oxide source. In some embodiments, related semiconductor device structures may include a doped metal oxide film formed by cyclical deposition processes.
    Type: Application
    Filed: April 28, 2023
    Publication date: August 17, 2023
    Inventors: Tom Blomberg, Chiyu Zhu
  • Publication number: 20230253182
    Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase non-metal halide reactant and a second vapor phase halide reactant. In some embodiments both the first and second reactants are chloride reactants. In some embodiments the first reactant is fluorinating gas and the second reactant is a chlorinating gas. In some embodiments a thermal ALE cycle is used in which the substrate is not contacted with a plasma reactant.
    Type: Application
    Filed: March 22, 2023
    Publication date: August 10, 2023
    Inventors: Tom E. Blomberg, Varun Sharma, Suvi P. Haukka, Marko Tuominen, Chiyu Zhu
  • Publication number: 20230212740
    Abstract: The present disclosure relates to methods and apparatuses for depositing a conductive layer on another conductive layer of a substrate. The method comprises providing the substrate comprising the first conductive layer in a reaction chamber, providing a cleaning agent comprising a metal halide into the reaction chamber in a vapor phase to clean the substrate and providing a second material precursor into the reaction chamber in a vapor phase to deposit the second conductive layer on the first conductive layer. The disclosure further relates to a method of forming a semiconductor structure and to a semiconductor processing assembly.
    Type: Application
    Filed: December 28, 2022
    Publication date: July 6, 2023
    Inventors: Chiyu Zhu, Sukanya Datta, Jan Willem Maes
  • Patent number: 11695054
    Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: July 4, 2023
    Assignee: ASM IP Holding B.V.
    Inventors: Chiyu Zhu, Kiran Shrestha, Petri Raisanen, Michael Eugene Givens
  • Patent number: 11658030
    Abstract: Methods for forming a doped metal oxide film on a substrate by cyclical deposition are provided. In some embodiments, methods may include contacting the substrate with a first reactant comprising a metal halide source, contacting the substrate with a second reactant comprising a hydrogenated source and contacting the substrate with a third reactant comprising an oxide source. In some embodiments, related semiconductor device structures may include a doped metal oxide film formed by cyclical deposition processes.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: May 23, 2023
    Assignee: ASM IP Holding B.V.
    Inventors: Tom Blomberg, Chiyu Zhu
  • Patent number: 11640899
    Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase non-metal halide reactant and a second vapor phase halide reactant. In some embodiments both the first and second reactants are chloride reactants. In some embodiments the first reactant is fluorinating gas and the second reactant is a chlorinating gas. In some embodiments a thermal ALE cycle is used in which the substrate is not contacted with a plasma reactant.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: May 2, 2023
    Assignee: ASM IP HOLDING B.V.
    Inventors: Tom E. Blomberg, Varun Sharma, Suvi P. Haukka, Marko J. Tuominen, Chiyu Zhu
  • Patent number: 11581220
    Abstract: Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process are disclosed. The methods may include: providing a substrate comprising a dielectric surface into a reaction chamber; depositing a nucleation film directly on the dielectric surface; and depositing a molybdenum metal film directly on the nucleation film, wherein depositing the molybdenum metal film includes: contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor; and contacting the substrate with a second vapor phase reactant comprising a reducing agent precursor. Semiconductor device structures including a molybdenum metal film disposed over a surface of a dielectric material with an intermediate nucleation film are also disclosed.
    Type: Grant
    Filed: January 18, 2021
    Date of Patent: February 14, 2023
    Assignee: ASM IP Holding B.V.
    Inventors: Bhushan Zope, Kiran Shrestha, Shankar Swaminathan, Chiyu Zhu, Henri Tuomas Antero Jussila, Qi Xie
  • Publication number: 20220403497
    Abstract: There is disclosed apparatus and processes for the uniform controlled growth of materials on a substrate which direct a plurality of pulsed flows of a precursor into a reaction space of a reactor to deposit the thin film on the substrate. Each pulsed flow is a combination of a first pulsed subflow and a second pulsed subflow, wherein a pulse profile of the second pulsed subflow overlaps at least a portion of a latter half of a pulse profile of the first pulsed subflow.
    Type: Application
    Filed: August 23, 2022
    Publication date: December 22, 2022
    Inventor: Chiyu Zhu
  • Publication number: 20220328318
    Abstract: There is provided a method of selectively depositing a material on a substrate with a first and second surface, the first surface being different than the second surface. The depositing of the material on the substrate comprises: supplying a bulk precursor comprising metal atoms, halogen atoms and at least one additional atom not being a metal or halogen atom to the substrate; and supplying a reactant to the substrate. The bulk precursor and the reactant have a reaction with the first surface relative to the second surface to form more material on the first surface than on the second surface.
    Type: Application
    Filed: June 21, 2022
    Publication date: October 13, 2022
    Inventors: Chiyu Zhu, Henri Jussila, Qi Xie