Patents by Inventor Cho Chiu Ma

Cho Chiu Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11195949
    Abstract: In a general aspect, a laterally diffused metal-oxide-semiconductor (LDMOS) transistor can include: a substrate of a first conductivity type; a buried well region of a second conductivity type disposed in the substrate; a body region of the first conductivity type disposed on the buried well region, a drift region of the second conductivity type disposed in the body region, a drain implant of the second conductivity type disposed in the drift region; a source implant of the second conductivity type disposed in the body region; and a gate structure disposed on the drift region. The gate structure can include: a field plate including a RESURF dielectric layer; a gate dielectric layer; and a gate electrode disposed on the field plate and the gate dielectric layer. The LDMOS transistor can also include a drain contact extending through the field plate and defining an Ohmic contact with the drain implant.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: December 7, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Cho Chiu Ma
  • Publication number: 20210119041
    Abstract: In a general aspect, a laterally diffused metal-oxide-semiconductor (LDMOS) transistor can include: a substrate of a first conductivity type; a buried well region of a second conductivity type disposed in the substrate; a body region of the first conductivity type disposed on the buried well region, a drift region of the second conductivity type disposed in the body region, a drain implant of the second conductivity type disposed in the drift region; a source implant of the second conductivity type disposed in the body region; and a gate structure disposed on the drift region. The gate structure can include: a field plate including a RESURF dielectric layer; a gate dielectric layer; and a gate electrode disposed on the field plate and the gate dielectric layer. The LDMOS transistor can also include a drain contact extending through the field plate and defining an Ohmic contact with the drain implant.
    Type: Application
    Filed: September 9, 2020
    Publication date: April 22, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Cho Chiu MA
  • Patent number: 7759731
    Abstract: A lateral trench MOSFET includes a trench containing a device segment and a gate bus segment. The gate bus segment of the trench is contacted by a conductive plug formed in a dielectric layer overlying the substrate, thereby avoiding the need for the conventional surface polysilicon bridge layer. The conductive plug is formed in a substantially vertical hole in the dielectric layer. The gate bus segment may be wider than the device segment of the trench. A method includes forming a shallow trench isolation (STI) while the conductive material in the trench is etched.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: July 20, 2010
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Donald Ray Disney, Cho Chiu Ma
  • Patent number: 7759200
    Abstract: A lateral trench MOSFET includes a trench containing a device segment and a gate bus segment. The gate bus segment of the trench is contacted by a conductive plug formed in a dielectric layer overlying the substrate, thereby avoiding the need for the conventional surface polysilicon bridge layer. The conductive plug is formed in a substantially vertical hole in the dielectric layer. The gate bus segment may be wider than the device segment of the trench. A method includes forming a shallow trench isolation (STI) while the conductive material in the trench is etched.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: July 20, 2010
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Donald Ray Disney, Cho Chiu Ma
  • Publication number: 20090215237
    Abstract: A lateral trench MOSFET includes a trench containing a device segment and a gate bus segment. The gate bus segment of the trench is contacted by a conductive plug formed in a dielectric layer overlying the substrate, thereby avoiding the need for the conventional surface polysilicon bridge layer. The conductive plug is formed in a substantially vertical hole in the dielectric layer. The gate bus segment may be wider than the device segment of the trench. A method includes forming a shallow trench isolation (STI) while the conductive material in the trench is etched.
    Type: Application
    Filed: April 29, 2009
    Publication date: August 27, 2009
    Applicants: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Donald Ray Disney, Cho Chiu Ma
  • Publication number: 20080048251
    Abstract: A lateral trench MOSFET includes a trench containing a device segment and a gate bus segment. The gate bus segment of the trench is contacted by a conductive plug formed in a dielectric layer overlying the substrate, thereby avoiding the need for the conventional surface polysilicon bridge layer. The conductive plug is formed in a substantially vertical hole in the dielectric layer. The gate bus segment may be wider than the device segment of the trench. A method includes forming a shallow trench isolation (STI) while the conductive material in the trench is etched.
    Type: Application
    Filed: August 28, 2006
    Publication date: February 28, 2008
    Applicants: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Donald Ray Disney, Cho Chiu Ma